Discontinuous Data Acquisition and data mismatch between each iteration loop in Host Vi with FPGA

[Aiman_Peter_Kim]

Hello guys,

Currently, I am using cRio-9066 with three NI-9220 modules for AI data acquisition.

To transfer the data from FPGA to Host Vi, I am using FIFO.

When I check the loop-time (25usec), it was checked as I set.

However, when I check the data, the data is jumping and discontinuous, when I compared last data of the first iteration with the first data of the next iteration. 

For my application, instantaneous data is very important. This kind of data mismatch between each iteration is not acceptable.

I am still stuck here to get continuous data and to match the data between the iteration.

Can you check my snap shot of the FPGA and host Vi ?

Thank you for your help in advance.

[MaxJoseph]

Hi,

To clarify;

• You use FPGA wait to set your loop rate to 25 µs.
• Each cycle you want to send your AI's to the host via DMA Target to Host FIFOs.
• You configure your DMA FIFOs to be large
• You use a shared variable (FIFO configured) to transfer your data to other areas of your application. 

On the AI read/FIFO write; There is a coercion dot on your FIFO write. Can you tell us more about the FXP you are reading and why there is a coercion dot here? Overflow/wrapping of your FXP coercion could be causing your problems.

On the DMA FIFO size configuration; do you have enough memory to acheive these sizes? I calculate you will need 80 TB of memory to achieve these sizes assuming each element is 32 bit deep! Can you talk about your thinking on how you arrived at this size? I am not sure if this would cause the problems you are observing, but it doesn't smell right!

On the shared variable; are you sure that this doesn't introduce your error? How would you catch is this was overflowing? Does the error teminal of share variable writes indicate timeout/overflow conditions? Monitor this and check.

I presume that the Mod5/6/7 booleans on the FPGA never become true. Is this the case? If not then overflow of your DMA writes might be causing your issues.

Now a more fundamental question; what are you measuring? Would you expect the AI to be continuous between measurements every 25 µs?

I am not sure how AI reads work outside of a Single Cycle Timed Loop (SCTL). Are you sure that the AI's will be read at the same time in the 25 µs loop time? It is my understanding that using while loops, rather than SCTLs, means that you do not know precisely when in the 25 µs window the read will occur. Variability in the sample time might lead to the results you observed.

Finally, can you post the data you obtain? The type of discontinuity and information about what is being measured might be useful in diagnosing your problem!