Data Transfer between FPGA and RT

[dmtd]

Hi,

I am trying to acquire data using NI 9250 module and cRIO-9043. I am using the FPGA mode. I am using two of the analog input channel of the 9250 module for data acquisition. I am using the FIFO to transfer the data between the FPGA and the RT. But I am getting only zero values instead of actual values. Please suggest me the proper way to transfer the data.

Thanks

    

[James_McN · Accepted solution]

Hi dmtd,

I don't think the problem is with your transfer but with the module setup.

That module uses something called a delta-sigma ADC. This has two implications for the FPGA code:

1. You must explicity start the module by wiring the start IO node for the module.

2. You should then remove timing from the loop as the IO node will drive the loop timing.

I'm guessing in this case, since the module isn't started, it is immediately returning zeros.

NI tend to have an example per IO module. If you look in example finder under Hardware Input and Output > CompactRIO > Module Specific IO > Analog Input there is an example called NI 9250 Getting Started which will demonstrate the full API on the FPGA. You can lose the interrupt and earlier configuration code if you aren't changing it.

Here is the key bit:

[dmtd]

James Mc,

I followed the example mentioned by you and it is working nicely. Thanks a lot.