Data Transfer b/w Target and host using DMA FIFO's

[Kalyansuman]

Dear NI,

     Am facing a problem while writing data into the DMA in the Host environment,

Steps i did:

1. Invoked the FIFO in the Host environment.

2.Connected it to the VI reference.

3.Configured the DMA Depth.

4.Started the FIFO.

5.An Array is initialised and adata is fed into Array using the File operations.

6.and the DMA is read in the Target VI.,

In the Above process, i attached a indicator to the DMA while reading in the Target environment,

but i could not observe any activity,

if some one tried please let me know the procedure to do the same,

am attaching the Host VI for reference

[Hillman]

Hi Kalyansuman,

 Good afternoon and thanks for your post.

I would again like to stress you must keep your post in one place on the forums. Now lets discuss your problem!

I am confused about what your trying to acheive. You want to read and write data from the FPGA?

Then normal setup is to open a FPGA VI reference, then do the read/write and close the reference outside of the loop.

 If then require to do this twice, I would have two loops. (but use the same references), then merge the error clusters, and the use a single close FPGA reference. 

The reason why your DMA may not be working:

1) Have you tried them on their own (just a read for example)?

2) Have you taken a look at the examples in NI Example finder? They have two which show how to implement FIFOs.

3) Is this a cRIO or an R-series board?

Any more clarifcation would be great. For example,do you get an error? what do you mean by no activity?