Data Acquisition using USB6341

[Vikrant_dhruva]

I am sending and recieving the data in the same VI. And I am getting the following error. I am using less samples and different channels of the port yet the error occurs.

[Kevin_Price]

A common rule of thumb for continuous acquisition is to read at least 1/10 sec worth of samples per iteration.

Your default values show an expected sample rate of 1000 and a # samples to read of 1000.  So that part *seems* fine *except* that you also seem to be using an external signal at PFI0 as a sample clock.

Is that signal really a 1000 Hz clock?  I'll bet it's something much faster than that, up in the MHz realm or nearly so.  In such a case, the 1000 samples you read might only represent a millisec or two.

Solutions:

- read more samples per iteration, starting with roughly 1/10 the frequency of the external signal

- don't try to update your graph display inside your acq loop with that many samples at a time.  You're wasting CPU trying to jam 10's or 100's of thousands of data points into a couple hundred pixels!

- be sure to tell DAQmx the *real* clock frequency in the call to DAQmx Timing.  When you use an external clock, DAQmx does *NOT* try to measure the frequency for you.  It's just going to believe what you tell it so the property node is just going to repeat it back.

-Kevin P

[ZYOng]

What is the actual clock signal frequency on PFI0? Is it 1kHz?

Try setting Samples per Loop to 1/10 of the sample rate. This will allow your NI-DAQmx Read VI to run more frequently.

[Vikrant_dhruva]

Thank you. I understood

[Vikrant_dhruva]

I actually used 'onboard clock' for USB6341.

The National Instruments USB-6341 DAQ (Data Acquisition) device has the following clock frequency specifications based on its documentation:

• Internal Base Clocks: The USB-6341 supports internal base clock frequencies of 100 MHz, 20 MHz, and 100 kHz. These are generated by the onboard oscillator and can be used as the timebase for various subsystems, such as counter/timers and analog or digital I/O operations.
• External Base Clock Frequency: The maximum external base clock frequency supported is 25 MHz. This can be used to generate a counter signal, for example, at up to 12.5 MHz (25 MHz / 2) when divided.
• Counter/Timer Clock: The four 32-bit counters/timers can use the internal or external clocks to perform tasks like PWM, frequency measurement, or event counting. The maximum frequency for counter operations depends on the timebase used (e.g., up to 100 MHz internally or 25 MHz externally).
  
  And reducing the Samples per loop also helped