I am using labview 8.6 with cRIO 9014, NI 9103 chassi with c series NI 9215, NI 9263 and NI 9403 modules. In my application, I have FPGA VI and RT host vi. Is there anyway to run FPGA VI as soon as power available to RT controller before I start running RT host vi (without the executable)? Using Digital I/O module (ni 9403), I am controlling external amplifier. Therefore I need some of the digital lines to be high as soon as RT controller gets its power. Right now I have to run the RT host vi to get those digital lines to high.
Thanks very much for the reply. I downloded bitfile to flash memory of the FPGA. It works ok. As soon as I power up RIO it starts running the bitfile. But when I started running my RT which referance to the same bitfile, digital lines goes to zero and comes back to 5v. I think open FPGA VI refernce function in RT vi restarts the FPGA vi. Is there a way to keep those digital lines high after I turn on power to RIO and keep those that way in the memory. And how to make sure running RT vi wont effect those line.
Every time your FPGA VI runs, it starts the digital lines at zero volts. How have you specified the FPGA file in the Open FPGA Reference? The Open FPGA reference opens exactly as the name of the function suggests--a reference or instance of the FPGA VI. Also as you have specified the bitfile, the values have been collected at high voltage. The one thing I can suggest to you is to flush out the FPGA memory so that you can be sure that it is not storing old data. Also what module are you using for the digital signals? I would also measure the channels of the module with a DMM to see if their output varies during acquisition. Hope this helps.