Compiling FPGA Conditional Disable Code while in Emulation Mode

[--thatguy]

If you compile an FPGA vi while in Emulation Mode, the code in the conditional disable case for FPGA_EMULATION == TRUE gets compiled into the lvbitx file.

This doesn't seem like correct behavior to me.  Emulation code should never make it into the bitfile.   Additionally on the host side the "Get FPGA VI Execution Mode" method will always claim FPGA Target when a bit file is being used, so your host won't even handle the emulation FPGA code. 

Is there a particular use case for this that I'm missing, or is this a bug?

[Kristen_K.]

Hi!

Thanks for posting on the forums.  You have a good point and I'm going to look a little deeper into this.  I'll post back once I've done a little digging!

Kristen H.

[Dragis]

This was reported to LabVIEW R&D (#183261) for further investigation.  This is a bug; code strictly for the emulation modes should never be compiled into the final bitstreams. For now you'll have to switch to the execution in hardware mode before attempting to compile the vi.

[SKauth]

Did something happen concerning this issue? I also tried to use the conditional compilation structure for simple switching between emulation with frontpanel elements and deployment on real HW using real I/O.

[charris]

Hello SKauth!

I can confirm that this was fixed in the LabVIEW 2010 FPGA Module (not all CARs make it into the release notes).

[SKauth]

That's nice to hear. Maybe we'll use LV 2010 for future developments, but we still need 8.6.1 for maintenance of our current systems.

For now I'll stick to this solution: Creating a new symbol and using this for debugging. and setting its value manually. I suppose when using the FPGA_EMULATION symbol is used, it should be set automatically.

Simo