do you have any approach to start working on it?
if you have it, please shared with me.
I do not see directly available signal - you need to generate it.
My approach would be to start a counter pulse output task with ticks. Source of the ticks - analog output sample clock. Continuous generation, ticks high + ticks low = length of your generation buffer. Start counter task before you start analog output.
Then you can use this counter output as a start trigger for analog input task. Falling edge will be 0 phase difference, rising edge phase will depend on ratio between high and low ticks.
Check routes, may be internal board counter will be enough.