One more time, FPGA coding, especially with more advanced IPs like the one you are dealing with is far from being that simple.
There are Boolean input and output terminals that are used to manage when input and output data are ready and/or valid. Just dumping the IP on your diagram and ignoring these will not work. For example; there is an Boolean input called input-data-valid. That one tells the IP it can use the input value and process it. If it is not connected like in your case you will never process any data.
Refer to the documentation and help and/or some of the shipping examples. You should really start from the beginning and practice the basic of LvFPGA programming first. This is advanced stuff and I am concerned we can keep exchange posting without making any progresses.
