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We appreciate your patience as we improve our online experience.
11-22-2010 03:53 AM
I can't get TNT4882 chip correctly addressed. I'm using onechip mode.
I execute following set-ups (constants from ESP-488 header files).
TNT_Out(R_cmdr,F_softreset); /* Reset FIFOS */
TNT_Out(R_keyrg,0);
TNT_Out(R_hssel,F_onechip); /* Set TNT to one chip WINK mode */
TNT_Out(R_misc,0); /* Disable HS mode */
TNT_Out(R_hier,B_dga|B_dgb); /* Set deglitching circuits to slowest value */
TNT_Out(R_auxmr,F_chrst); /* Reset TNT */
TNT_Out(R_auxmr,F_pon); /* Clear Power On */
TNT_Out(R_admr,F_normalprimary); /* Set address mode */
TNT_Out(R_adr,13); /* Set primary address */
TNT_Out(R_adr,B_ars|B_dt|B_dl); /* capabilities */
Right after this setup
TNT_In(R_adr0) and TNT_In(R_adr1) return
R_adr1=0x01 and R_adr1=0x00
According to documentation R_adr1 should never return 0x00, value should be 0x80 or higher.
After TNT4882 gets addressed as listener (to wrong address 0),
TNT_In(R_adr0) and TNT_In(R_adr1) return:
R_adr0=0x0d and R_adr1=0x01 or
R_adr0=0x0d and R_adr1=0x21 or
R_adr0=0x0d and R_adr1=0xa1
Now R_adr0 seems to be OK, but again R_adr1 is wrong and to repeat, TNT4882 gets addressed to wrong gpib address 0.
I have used very conservative timing. I have used two boards with similar results. However, I do get the *IDN? quite correctly from MAX device scan.
I have also used that "anymode setup" in the beginning of setup procedure with no change to response.
Do anyone have any suggestions or find anything wrong in the setup?
-Matti
Solved! Go to Solution.
11-24-2010 05:05 AM
Couple of fixes regarding to my claims what adr1 should be - in fact I dont know what it should respond when not in use.
@mattikk wrote:
I can't get TNT4882 chip correctly addressed. I'm using onechip mode.
I execute following set-ups (constants from ESP-488 header files).
TNT_Out(R_cmdr,F_softreset); /* Reset FIFOS */
TNT_Out(R_keyrg,0);
TNT_Out(R_hssel,F_onechip); /* Set TNT to one chip WINK mode */
TNT_Out(R_misc,0); /* Disable HS mode */
TNT_Out(R_hier,B_dga|B_dgb); /* Set deglitching circuits to slowest value */
TNT_Out(R_auxmr,F_chrst); /* Reset TNT */
TNT_Out(R_auxmr,F_pon); /* Clear Power On */
TNT_Out(R_admr,F_normalprimary); /* Set address mode */
TNT_Out(R_adr,13); /* Set primary address */
TNT_Out(R_adr,B_ars|B_dt|B_dl); /* capabilities */
Right after this setup
TNT_In(R_adr0) and TNT_In(R_adr1) return
R_adr1=0x01 and R_adr1=0x00
Claim below is not true
According to documentation R_adr1 should never return 0x00, value should be 0x80 or higher.
After TNT4882 gets addressed as listener (to wrong address 0),
TNT_In(R_adr0) and TNT_In(R_adr1) return:
R_adr0=0x0d and R_adr1=0x01 or
R_adr0=0x0d and R_adr1=0x21 or
R_adr0=0x0d and R_adr1=0xa1
Now R_adr0 seems to be OK, but again
R_adr1 is wrong andto repeat, TNT4882 gets addressed to wrong gpib address 0.
I have used very conservative timing. I have used two boards with similar results. However, I do get the *IDN? quite correctly from MAX device scan.
I have also used that "anymode setup" in the beginning of setup procedure with no change to response.
Do anyone have any suggestions or find anything wrong in the setup?
-Matti
11-24-2010 02:29 PM
Hello Matti,
I have performed the same setup (according to ESP-488) and received no problems at all. Since you keep reading back 0x0 from ADR1, I'm inclined to think that the three most significant bits in the data lines are malfunctioning or not connected correctly. Malfunctioning address lines could also cause this problem. The CNT registers (CNT0 - 3) can be used to read and write. I would recommend making sure that you can write different patters to these registers and receive them correctly. This is just a test to make sure that you can actually read and write to the registers of the TNT4882.
Thanks,
Steven T.
11-25-2010 01:03 AM
Hello Steven!
I executed full scan (wrote 0..255 and read back) over cnt0..cnt3, no errors detected.
In fact I have preceded to talker side and found another problem. It seems that I can't get EOI asserted even though I have set terminal count with cnt0 and cnt1 (16 bit counter mode) and also R_cfg/B_ccen is active. Otherwise transmission seems working fine. Should I consider 32 bit counter mode?
To summarize status at the moment:
- Listen and Talk work somehow, but gpib gets always addressed to primary address 0. Adr0 responds 0x0d or 0x8d (corresponding to R_adar setup 0x0d) but not before addressed to gpib first time.
-Talk does not assert EOI.
Thanks,
Matti
11-25-2010 02:36 AM
Hi Steven,
Should adr0 respond immediately what was written to adr register - except bit 7? There seems no correlation between adr registers write and immediate readback from adr0 register. Adr0 responds always 0x01. Then after gpib controller addresses TNT4882, adr0[4..0] and adr[4..0] match. Still TNT4882 gets addressed to primary address 0.
-Matti
11-25-2010 03:06 AM
I found that silly mistake not setting terminal count as 2's complement. Now EOI gets asserted.
Still no faintest glue about that addressing problem. I tried setting address before setting to onechip mode ( TNT_Out(R_hssel,F_onechip); ) - no difference in adr0 reading.
I can't find any problems with NI Spy, everything seems working fine apart from the fact that Primary Address = 0.
Thanks,
Matti
11-26-2010 06:59 AM
Hi,
I'm using TNT4882 in Generic Pin Configuration arrangement, if it matters.
-Matti
11-30-2010 10:57 AM
More gray hair!
I tried workaround using cptr with following setups:
---- Setup prior to interrupt handler
TNT_Out(R_keyrg,0); /* mode and not 9914 */
TNT_Out(R_hssel,F_onechip); /* Set TNT to one chip WINK mode */
TNT_Out(R_misc,0); /* Disable HS mode */
TNT_Out(R_hier,B_dga|B_dgb); /* Set deglitching circuits to slowest value */
TNT_Out(R_auxmr,F_chrst); /* Reset TNT */
TNT_Out(R_auxmr,F_pon); /* Clear Power On */
TNT_Out(R_admr,F_noaddress); /* Set address mode */
TNT_Out(R_adr,addr); /* Set primary address */
TNT_Out(R_adr,B_ars|B_dt|B_dl); /* */
TNT_Out(R_spmr,0); /* Clear SPMR */
TNT_Out(R_auxmr,HR_ppr|B_u); /* NO parallel poll */
nanosleep(&usec,&rem);
TNT_Out(R_auxmr,F_hldi); /* Issue hold off immediately */
--- Interrupt handler test for cptr
TNT_Out(R_imr0,B_glint); /* */
TNT_Out(R_imr1,B_cpt); /* device clear enabled command pass through */
TNT_Out(R_auxmr,HR_auxrf|B_dhala|B_dhata); /* Set TA and LA holdoff */
TNT_Out(R_imr3,B_tlcint);
while(1)
{
enable_irq(AT91SAM9260_ID_IRQ1);
down_interruptible(&io_tnt4882_info.irq_sem);/* wait semphore from interupt service routine */
printk("i:%d cptr=0x%.2x isr1=0x%.2x\n",i++,TNT_In(R_cptr), TNT_In(R_isr1));
TNT_Out(R_auxmr,F_valid);
mka_printk("cptr=0x%.2x isr1=0x%.2x\n",TNT_In(R_cptr), TNT_In(R_isr1));
}
---- results by running NI-MAX runs Scan For Instruments
=> 65 times followint two lines (i:x, x=0-64)
i:64 cptr=0x18 isr1=0x80
cptr=0x14 isr1=0x00
-- last set, latter cptr=0x10
i:65 cptr=0x18 isr1=0x80
cptr=0x10 isr1=0x00 <= last line cptr=0x10
Good news: isr1 works as expected (reset on read)
Bad news: cptr does not show sensible operation.
---- Trial 2: Same setup as before +
TNT_Out(R_auxmr,HR_auxri|B_sisb);
---- Interrupt handler as before, but loop broken
-- results from the first set (broken loop required)
i:0 cptr=0x18 isr1=0x80
cptr=0x14 isr1=0x80
-- isr1 bit 7 does not get cleared even though should according to Programmer Reference Manual/Table 3-14
BTW. my device is TNT4882-BQ.
Any suggestions?
-Matti
12-01-2010 09:12 AM
Hello,
Using the ESP-488, I can confirm that the code and chip combination works correctly. I added some print statements and I found that the adr0 and adr1 registers display the correct addresses immediately after the adr register is set. When I scan for instruments after running just the initialize interface code, I see that there is only an instrument at primary address 1 (I don't get a response from the *IDN? query, but I do get a result that the instrument is initialized correctly).
There is something very fundamental that is going wrong. It should not be necessary to use the CPTR to get the commands...since even these are not showing up correctly, I still think there is a hardware problem.
ESP-488: http://joule.ni.com/nidu/cds/view/p/id/223/lang/en
Thanks,
Steven T.
12-02-2010 10:22 AM
Than you Steven for your valuable advices. I found the problem related to PAGED pin. This was left NOT grounded from the initial approach using 9914 compatibility mode. PAGED mode prevented from using the register I reported not working. Now things work fine.
Thanks,
Matti