TNT4882 in Turbo-7210 mode ===================== // chip reset // WriteTNTreg(AUXMR,0x02); //1-Soft Reset WriteTNTreg(CMDR,0x22); //1 //2-Place the TNT4882 in Turbo+7210 Mode WriteTNTreg(HSSEL,0x00); //2 WriteTNTreg(SPMR,0x80); //3 WriteTNTreg(AUXMR,0x80); //4 WriteTNTreg(SPMR,0x99); //5 WriteTNTreg(AUXMR,0x99); //6 WriteTNTreg(AUXMR,0x02); //7 WriteTNTreg(AUXMR,0x8E); /*<AUXRA> *///8 WriteTNTreg(AUXMR,0xA8); /*<AUXRB> *///9 WriteTNTreg(AUXMR,0x49); /*<AUXRG> *//11 WriteTNTreg(AUXMR,0xE4); /*<AUXRI> //SISB=0, reading ISRx clears it*///12 WriteTNTreg(AUXMR,0x50); //Page in IMR0 WriteTNTreg(0x0C,0x80); // IMR0 WriteTNTreg(IMR1,0x10); //INT on ENDRX is ENABLED WriteTNTreg(IMR2,0x00); // not used WriteTNTreg(AUXMR,0x50); //Page in ISR0 ReadTNTreg(0x0C,&general); // clear ISR0 ReadTNTreg(ISR1,&general); // clear ISR1 ReadTNTreg(ISR2,&general); // clear ISR2 WriteTNTreg(AUXMR,0xE5); /*<AUXRI> //SISB=1, reading ISRx doesn'tclears it*/ WriteTNTreg(ADMR,0x31); WriteTNTreg(ADR,GPIBaddress); WriteTNTreg(ADR,0xE0); WriteTNTreg(SPMR,0x00); WriteTNTreg(CMDR,0x04); //go clear stop and halt WriteTNTreg(EOSR,0x0A); //EOSR=line feed WriteTNTreg(AUXMR,0x8E); // AUXRA: Enable EOS WriteTNTreg(IMR3,0x02); //Enable END RX WriteTNTreg(AUXMR,0x00); //6 clear PO msg WriteTNTreg(AUXMR,0x03); //Finish Handshake(rhdf) I used the chip in One-Chip mode and it worked. I set the above initialization to switch the chip to Turbo+7210 mode I couldn't get it to generate interrupt. Is there anything missing in the above initialization? Thanks

Instrument Control (GPIB, Serial, VISA, IVI)

Author

Yes I do

Message 21 of 23

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Author

Mr. Collin, thank you very very much for exchaging the idea with me.

I resolved the issue , it's a timing conflict during accessing the TNT registers.

Message 22 of 23

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I'm glad to know you fixed it as I was out of ideas!

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