In UART-based serial communication, idle is always active ("logic high"), start is always inactive ("logic low"), and stop is always active ("logic high"). Again there is no way to configure this, so the default vis should do the trick.
Btw, a word of caution - TX and RX are inverted "on the line" so active (or mark) is a negative voltage and inactive (or space) is a positive voltage. An idle line will have a negative voltage with the start of the data frame being the negative to positive transition that represents the beginning of the start bit.