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NI MGT Debug for the NI PXIe-6591R/92R


This package includes the MGT Debug Toolkit, which is an API designed to easily adjust low-level MGT (Multi-Gigabit Transceiver) settings on the PXIe-6591R and PXIe-6592R.  Included are several LabVIEW examples that are useful for design or test engineers to characterize the physical layer of their SERDES link.  A single bitfile has been designed that allows for dynamic reconfiguration (without compiling) of the following settings:

  • Line rate
  • TX Pre and Post Emphasis
  • Differential Voltage Swing
  • RX Equalization


The MGT Debug supports in hardware pattern generation and checking capabilities for the following sequences:

  • PRBS-7
  • PRBS-15
  • PRBS-23
  • PRBS-31
  • Square Wave

Please see MGT Debug Getting Started.pdf inside the attached zip file and the following video for more details. 


Latest Version

NI MGT Debug Toolkit v1.0.2

Version 1.0.2 fixes an issue occurring in LabVIEW FPGA 2016 and later where the instruction FIFO resource is incorrectly capitalized, leading to compilation failures.


NI MGT Debug Toolkit v1.0.1

Version 1.0.1 fixes an issue where the FPGA Build Specification would attempt to place the compiled bitfile in a path that does not exist.


Software Requirements

NI LabVIEW 2014

NI LabVIEW 2014 FPGA Module

NI LabVIEW Instrument Design Libraries for High-Speed Serial Instruments 14.0


Hardware Requirements

NI PXI Express Chassis

NI PXI Express Controller

NI PXIe-6591R/6592R


The attached Code is provided As Is.  It has not been tested or validated as a product, for use in a deployed application or system, or for use in hazardous environments.  You assume all risks for use of the Code and use of the Code is subject to the Sample Code License Terms which can be found at: http://ni.com/samplecodelicense



I tried to run this example using NI PXIe-6592R but an error occure every execution :


Error -1074101883 occurred at niInstr Subsystem Map v1 Host.lvclass:Lookup Single Context.vi:30001

Possible reason(s):

Failed to look up the address space with the parameters specified. The corresponding address space might not be instantiated and connected to the instruction framework on the target. You may need to load a different bitfile on your FPGA target.

Complete call chain:
niInstr Subsystem Map v1 Host.lvclass:Lookup Single Context.vi:30001
NI GTX Toolkit Base v1 Host.lvclass:Initialize Channel Instances.vi:6810001
NI GTX Channel v1 Host.lvclass:Open.vi:5680001
NI GTX Line Rate Debugger v1 Host.lvclass:Open (entire device).vi:3350001
Line Rate and Clock Status Check.vi


I recompile the Bitfile, execute it on the target but without effect on the error.

Can you help me to resolve it ?


Thank you, regards



Hello All,

May I ask will this example "NI659xR_MGT_Debug_Examples_v1_0_2.zip"  also work with PXIe-7915 using its DIO connector ?

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How can I make it compatible with the 6594 GTY transceiver?