LabVIEW FPGA Resolver Simulation and Measurement with Excitation Sync

[MarcoPolo5]

Introduction

Resolver measurements can be simulated and measured with R-Series FPGA boards. This example provides an example of how this can be done.

Notes

PXI / PCI FPGA R-Series boards nor C-Series analog output modules will not drive sufficient current to provide direct excitation for most resolvers (typically requiring in the range of 10's to 100's of mA). Excitation signal must be either amplified or from another source.

PXI / PCI FPGA R-Series boards are recommended for simulated resolver signals since Analog Outputs are clocked at 1MHz. cRIO-9263 Analog Output module (100kS/s) is not fast enough for a good analog output waveform at common excitation speeds of 5kHz and 10kHz. Quantization steps will be significant. 400Hz excitation would be acceptable with this module.

The FPGA fixed point math encoding / decoding the resolver signals has sufficient accuracy for 16 bit analog ouputs and inputs. With 16bit analog outputs (+/-10V), the code should theoretically supplyt 0.005 degrees accuracy simulation - but realistically 1-2 bits will be lost in noise as the signal is transmitted. (14 bits = ~0.02 deg).

All of these errors increase as the signal amplitude is decreased. With PXI / PCI FPGA boards, there are no settable gains to spread the 16 bit analog output resolution over a smaller voltage output. So if the signal is set to 5V pk-pk, the accuracy is likely to be ~0.09deg. One of the largest contributing factors to error is the peak-peak voltage output range for the simulated signal. The closer it is to 20V pk-pk, the more accurate the simulation will be.

This is the resulting graph of a sweep from 0 to 360 degrees where the FPGA board was simulating and measuring a resolver signal that was sync'ed to an external signal generator set to 400Hz 5V pk-pk. This is worse than a simulation only standpoint because decoding errors are present as well.