Overview
Acts as a dynamic 64x64 bit digital switch matrix. Any of the 64 inputs can be connected to any of the outputs. A single input can drive multiple outputs.
The matrix of connections from input to output can be remapped on the fly without recompiling the FPGA VI.
This example program implements a 64x64 bit digital switch matrix in FPGA. The example also includes a host VI that can update the lookup table of the switch matrix on the fly without recompiling the FPGA code. The host VI updates the look up table of the FPGA via DMA Transfer.
The functionality of the code is implemented by polling 64 digital inputs of the card and comparing them to a look up table in FPGA flash memory. Based on the matrix map in memory, the correct output values are then updated. Because this application polls the input values at 40Mhz, the output is updated within 2 us of a value change on the input. If an input pulse is shorter than 2 us, the FPGA may miss the input pulse and no resulting pulse may be output.
The example is compiled for a PXI-7833R card. Because the PXI-7833R has only 96 DIO line, the effective matrix built on this card is 48x48. You can Create a 64x64 matrix by adding the additional lines to the project and VI and then recompiling.
Signal Connections:
Digital Input Ports: DIO 0.0, 0.1, 1.1, 2.1, 3.1, 4.1
Digital Output Ports : DIO 1.0, 0.2, 1.2, 2.2, 3.2, 4.2
The example can easily be edited and recompiled for any of the RIO targets.
