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Overview
The following example demonstrates how to generate analog data using the AT 1120.
Description
This example shows how to continuously generate analog output data from the AT 1120 adapter module. It allows the user to enable each channel individually as well as dynamically modify the output waveform. This VI is compiled for all FPGA targets by default.
Requirements
Software:
Steps to Implement or Execute Code
Additional Information or References
VI Snippet
**This document has been updated to meet the current required format for the NI Code Exchange.**
Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.
Hi, thanks for this example code to get started with AT module.
Just running this example, I get error -304003 from time to time at the very beginning.
It seems that this error is related to initialization of AT adapter module.
It is found that, in AT's code, there is a subVI called "SerialRead.vi" (........\AT 1212 - Getting Started.zip\AT 1212 - Getting Started\EEPROM\SerialRead.vi ). That VI doesn't properly handle dataflow (or error handling) and as a result there is a potential race condition between two VIs that does a part of initializaion process.
I forced data flow between the VIs, then, the error stops occuring.
Thanks!
Osamu