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6229 Register Map Reference

I have two register maps for the 6229 I just purchased: a generic M Series one that is from '05 and states "preliminary" and a TIO one.  I need to know where these maps reside.  Can I assum both maps are referenced to BAR1 (I notice BAR0 is active on teh board as well so I am a little confused)).  Is the TIO device at offset 0x100 from BAR0?  What about the "preliminary M Series registers"?  The NI Automation Explorer is able to come up with a serial number but I dont see that identified on either of the mappings I have.  The best I see is a "Chip ID" for the TIO which is only a version code and not a real ID.
 
-Bob
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An update:  I cant seem to read the same data from BAR1 as the NI Automation Tool does.  When I try to read from BAR1, I get ffffffff all the way up to BAR1+1000h.  Then I start getting what looksl like valid reads.  The Automation tool seems to be able to read below offset 1000h just fine.  I can read BAR0 space fine and for the most part, I get results which agree with the Automation tool.  Any clue as to what might be happening?  I just want to be able to do some simple demand type analog in with this board and I find I am getting overwhelmed at step zero.

BTW: I am using DOS 6.22 with DJGPP in protected mode (using CWSDPMI protected mode interface).  I general, I need to map the BAR spaces using a dpmiAllocate() calls which returns a selector/segment.  Once I get this reference, I use farpeekl() calls with offsets.  It seems to work fine with all otehr PCI devices I have used.

-Bob

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Hi Bob-
 
You won't be able to read/write registers mapped to BAR1 by the board without some additional configuration.  The MHDDK examples show the necessary steps to map BAR1 through the MITE PCI interface.  You'll need to perform the steps shown in initMite() (in main.cpp from the M Series MHDDK examples) in order to achieve the operation you described.
 
The STC-II (aka M Series timing chip) is indeed located beginning at offset 0x0 from BAR1.  The M Series MHDDK example aiex1.cpp shows how to perform a simple on-demand acquisition.  The TIO registers begin at offset 0x100 from BAR1.  Examples of configuration and use of the TIO registers is shown in the gpctexN.cpp examples from the M Series MHDDK examples.
 
Hopefully this helps-
Tom W
National Instruments
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Thanks Tom.  Looks like I jumped the gun on the steps needed here.  I will go over the example more thoroughly.  -Bob
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