problem with repeat forever scriptTrigger0

[kkwong]

 I have the following problem when use "repeat forever"

here is the script

 repeat forever
 generate default
  if scriptTrigger0
    generate Vin0plusLo
  end if
 end repeat

"default": Total 6 patterns which are the same.  DIN1-DIO12=HI, DIO13-DIO15=LO
"Vin0plusLo":  Total 2 patterns.
[1] DIN1=LO, DIN2-DIN8=HI, DIO9=LO DIO10-DIO12=HI, DIO13-DIO15=LO
[2] DIN1=HI, DIN2-DIN8=HI, DIO9=LO DIO10-DIO12=HI, DIO13-DIO15=LO

My C code is like this.  It will loop forever.

j=0; i=1;
while (i)
{ 
   if (j==0)
              checkErr(hsdio.send_gen_trigger("scriptTrigger0"));

}

1. The output patterns are not consistent.

a) for the 1st "scriptTrigger0" sent.  all the DIN's were pull to LO from HI.  see DIO_plot1

ch1=DIO1, ch2=DIO4, ch3=DIO9 

b) afterward we see 2 types of outputs for the others "scriptTrigger0".  See DIO_plots2 and DIO_plot3

ch1=DIO1, ch2=DIO4, ch3=DIO9 

DIO_plot3 is what we expect to see.  But we captured DIO_plot2.TIF from time to time.  We have no control of which one the DIO will generate.

What's wrong with my codes?

The device I am usng is DIO PCI-6552. Clock frequency is 5MHz.

[Aaron_W.]

kkwong,

Thank you for using the NI Forums. It appears to me as though you are occasionally missing a clock cycle and this could be due to a trigger being missed. Seeing as Image 2 has a 200 nS delay added between switching values and when running at 5 MHz, your period of the signal would be 200 nS. What type of clock are you providing from the device, is it external or internal? Also, what edge are you triggering off of for you script? Could you try triggering off of the other edge? You might also try to generate more samples in your script and add more samples to your Vin0plusLO. This may help the issue. You mentioned that occasionally you are seeing the image 2, which is not correct, how often are you getting the incorrect data, every 10 runs, 100, more? 

[kkwong]

Thank you for your prompt reply. I don't think the issue is missing a clock cycle. I have put the 3 plots in a xls file and added some more description there. 

The frist problem is all Channels suddenly pull to low for more than 6us in repsonse to the 1st script trigger.

The other problem is I expect ch1 and ch3 to be Low for 200ns and 400ns respectively. But I often get ch1 and ch3 low for 400ns and 600ns, respectively.  I see that very often. 

 Even though I step running the code, I still see these 2 problems.

For your information, I am using Internal clock.  However, I don't know what triggering edge it is configured for the scriptTrigger. I did not set this up.  Will this be a problem?  Here is the code I used to set up the script Trigger.

niHSDIO_ConfigureGenerationMode (generation_session, NIHSDIO_VAL_SCRIPTED);
niHSDIO_ConfigureSoftwareScriptTrigger(generation_session, "scriptTrigger0");
niHSDIO_SendSoftwareEdgeTrigger(generation_session, NIHSDIO_VAL_SCRIPT_TRIGGER, "scriptTrigger0");

I will try to add some more sample in Vin0plusLo.

[kkwong]

I just tried to add some more samples in Vin0plusLo.

The results are similar.

If I add 2 more samples. I often got ch1 and ch3 low for 400ns and 1000ns, respectively

The correct result should be 200ns and 800ns for ch1 and ch3.

If I add 2 more samples. I often got ch1 and ch3 low for 400ns and 1200ns, respectively

The correct result should be 200ns and 1000ns for ch1 and ch3.

Message Edited by kkwong on 04-06-2009 09:31 PM

[Aaron_W.]

kkwong,

I thought it could be missing a clock cycle because the delay was the same as one of your clock cycles, why don't you think it is possible that you are missing a clock cycle? I have also attached some C examples from the HSDIO Directory that does Dynamic Generation with Scripting. This should give you a good example of  how to start with scripting with our Dynamic Generation. This example can also be found in the following directory: C:\Program Files\IVI\Drivers\niHSDIO\Examples\c\Dynamic Generation with Script. 

[kkwong]

Hi Aaron,

     The plots I attached were output of DIO1, DIO4, and DIO9.  Not the clock signals.  You should notice that my expected waveforms, which is plot3,  should have pulling DIO1 and DIO9 to low for 200ns and 400ns.  But now they are pull to low for 400ns and 600ns.  So are you suggesting that a missing clock cycle will give such result?

      I will try to modify the example with my waveforms and see how it goes.

      Thanks!

Message Edited by kkwong on 04-07-2009 10:40 PM

[kkwong]

Hi Aaron,

     Just test the example with adding a repeat forever loop with scriptTrigger.   Still have problem.  Attached please find the whole project.   I set DIO0 to HI by default. Then pull it Lo for 1 cycle when receiving a scriptTrigger. 

The output.zip contains the output waveforms captured. Output1.jpg and Output2.jpg are with different pull low duration for the same run  When abort, there is an error message, also include in the output.zip.

Thanks!

[Aaron_W.]

kkwong,

I noticed that on your graph that when you got the bad data that DIO1 and DIO9 go from DIO1 being 200 ns and DIO9 being 400 ns to DIO1 being 400 ns and DIO9 being 600 ns. I was looking at these number and noticed that the low signal on these lines stayed low for an additional 200 ns, which is the exact length of your clock period. This is what made me think that the issue with the code could be that you missed a clock cycle with your trigger. By missing a clock cycle I could potentially see why the data is being delayed like what you are seeing. 

The reason that you are getting the error in your code is because you are trying to output data faster than you are giving the card samples in your code. I can't tell the exact location of this right now in your code, but if you generate samples faster before you output them to your device that should help get the error to go away, let me know if that helps. 

[Aaron_W.]

kkwong,

I was able to look into a couple more items in regards to your code. First, you have your default pattern set to 6, is there a specific reason for this? You could also set you default pattern to two sample if there is not a specific reason to have it set at 6. You might also just do static on the lines that are not changing and then have line 1 and 9 generate dynamically.  Also could you tell me exactly what connections you have made when you physically wired up the trigger, I want to make sure you have the connections correct. Could you also try and put a delay in your "C" code that waits to send the next software trigger and see if that possibly helps the issue. I did some more checking around and noticed found that you should never get the error that you are getting if your samples are loaded to your onboard memory correctly, you might check and make sure that you are not transferring data between the board and the PC while the script is running, other than the software trigger. Also, you should use "wait until scripttrigger" instead of scripttrigger. Let me know how this goes. 

[Aaron_W.]

kkwong,

You might try making your script look like this: 

Generate default

clear your script trigger

wait until script trigger

generate Vin0plus

Try that and let us know how it goes.