Low sampling rate in FPGA.VI

[Michael_Becker]

Hi,

I'm new in FPGA programming. I use a cRio-9074 with an NI 9411 digital input module (among others). As software I use NI-RIO 4.0 and LabVIEW 8.6.

My aim is to detect and count pulses of an hydraulic flow sensor. This sensor has a maximal output rate of 150 Hz (=maximal flow). The width of the pulses I can set in a range of 1ms to several ms. With an oscilloscope I have checked if the sensor is working correctly.

Now, the problem: You can see the very simple structure of the FPGA.VI in the attached picture "FPGA file". The loop timer is configured to uSec, so I'm able to set the loop time at the front panel. When the program is running at maximal flow (input pulse at 150 Hz), the system can't detect all pulses. The Waveform Chart shows a sampling rate of only about 2 S/s with random detected pulses (of different length and width). I have tried the same with a timed loop at 40 MHz Timing Source (default).

How can I increase the sample rate or achieve the aim on another way?

Thanks for your reply,

Michael Becker

[SFK · Accepted solution]

Hello Michael,

the explanation is simple: FPGA code is designed to run headless. When you run a VI an an FPGA, the code is compiled into the FPGA gate logic. This logic incorporates a code (debugging logic) that transmits the values of all controls and indicators only sporadically to and from the host if the VI is run from Windows with an open front panel.

This means that although your FPGA code will measure all pulses, you will not be able to visualize them properly with your design approach.

The solution for your issue is to create a (optionally deterministic) communication structure from the FPGA to the CompactRIO's RT Controller to transfer the measurements, and then transfer them to your MS-Windows host application for visualization purposes.

A  good starting point for learning FPGA fundamentals is the online training that can be found at

https://www.ni.com/en/shop/compactrio/compactrio-developers-guide.html

Additionally, you can download the complete CompactRIO Developers Guide here:

https://www.ni.com/en/forms/compactrio-developers-guide-full.html 

Additionally, I would like to recommend the NI training courses on RT and FPGA programming that use a cRIO system for training.

Best regards,

Sebastian 

[Michael_Becker]

Hello Sebastian,

thanks you very much for your reply. We solved the problem.

Best regards

Michael

[NI-hilator]

Sebastian,

There seems to be two version of the fullcriodevguid.pdf.  Neither one has dates so I can tell which is the most current.  The link you gave to directly download the guide [ http://ftp.ni.com/evaluation/crio/fullcriodevguide.pdf  ] is a different version than the "Download the complete guide " link at the bottom of the first link you gave https://www.ni.com/en/shop/compactrio/compactrio-developers-guide.html which is https://www.ni.com/en/forms/compactrio-developers-guide-full.html and brings you to this version: http://www.ni.com/pdf/products/us/fullcriodevguide.pdf.   As you can see the urls to the pdfs are different and indeed bring up two different versions.

Can you tell us which is the most current?

Thanks!