How do I implement a stop trigger for my 6602 counters?

[rink]

I currently have the start of data acquistion for two channels syncrhonized with a start trigger. I am doing simple event counting using two seperate counters.

For my start trigger, I use a third counter to generate a single pulse and put the output on the trigger line that the two counters are watching.


Works great! But, I also want to synchronize the stopping of data acquisition for the two channels. I thought this would be simple as configuring a ND_STOP_TRIGGER like I did a ND_START_TRIGGER. But, this is giving me errors.


Does the 6602 not support stop triggering? Am I just out of luck?

[bman]

Kay

One option you may want to consider is using the third counter to Gate the two counters that are doing event counting. (Not simple event counting.) When the signal on the Gate is high, the counters will count the pulses on the Source, then when the signal on the Gate goes low, the counters will stop counting. This may work for your application if you know how long you need to count.


Let me know if this will not work and I may be able to think of another solution.


Brian

[Achim]

Hi there,

this thread is quite old but I'm facing the same problems.

I'm using a PXI-6602 and a PXI-6521 in a PXI-1033 chassis. On the 6521 I create a continuous sample pulse as a counter output. This I route to the PXI_Trig0.
On the 6602 I have two counters set up to continuous edge counting with the external clock configured to PXI_Trig0.
I start counting by setting a internal trigger channel to high which is routed to PXI_Trig1, and this is configured as the start trigger signal for both counters on the 6602 so that they count simultaneously based on their common sample clock.

This works quite good...but I have some problems to stop the counting.

I have to stop counting as soon as I have reached 1024 increments (one revolution of a wheel, signal duty cycle 50 %) on one counter and then I have to check if the other counter have reached at least 48 (duty cycle 50%) or 96 pulses (duty cycle 20% or 80%, depending on the revolution direction).
So far I read the counter value of ctr1 in a loop and if the value is equal to or greater 1024 I stop. Sometimes I miss the value 1024 (how can this happen as I count buffered + continuously?) I make a retry. But I get the impression that even I configured both counters with the same start trigger and sample clock, the counting isn't synchronous. When I try it with two function generators, I works quite good but not perfect. If I connect real life signals, in the lower frequency range (up to 500 1/min of the wheel), I almost always have fewer pulses then necessary, e.g. 88-94 pulses instead of 96. In the upper frequency range (up to 3000 1/min of the wheel), I have way too much pulses, e.g. 122-125 pulses instead of 96.

I use the digital filters of the counter board for both TTL signals.

Does anybody have an idea what I can do on this subject?

Thanks in advance for any help

Regards
Achim

[Kevin_Price]

I only have time for a few brief comments:

1. On missing the specific value of 1024:  Very likely, both count values 1024 and 1025 (plus perhaps some others) are being registered in between sample clock edges.  The value that gets buffered is whatever is in the count register at the instant of the sample clock edge.  Your counter sees #1024 and counts it, but it *also* sees and counts #1025 before the next sample is taken.

2. Counting not in sync:  Given your description, I believe that the samples *are* in sync.  However, your method of reading the samples may not be carefully maintaining that synchronization.

The counts are incrementing instantly with input edges and the data acq buffers are being updated simultaneously with sample clock edges.  However, the function calls to READ the data are governed in part by software timing.  The software calls to read the 2 counters must happen sequentially, with some amount of time (probably small) elapsing between them.

In these situations, I suggest that you be careful to read the SAME # of samples from each data acq task rather than using the unwired default of "read all available samples."   Because your hardware is sync'ed, you can keep your read data sync'ed by reading the same amount of data from each task.  You could read all available from the 1st task, then query the size of the data array to determine how many samples to read from the 2nd task.

3. You may not need the PXI_Trig1 start trigger at all, depending on other aspects of your app.  If your two edge-counting tasks are started *before* the sampling clock signal is started on PXI_Trig0, then they will be hardware-sync'ed even without using an arm start trigger.

-Kevin P.

[COUNTERS]

Will you plaese give me an idea of how to synchronize the  two timers of same device .

[Chris_K_]

Hi Counter. 

I assume you are asking how to synchronize two counters on the same device.  If not, can you please clarify your question?

You can easily synchronize two counters to by configuring a digital start trigger for each of the counter tasks and then use the same trigger source at the trigger pulse.  Please see Gen Dig Pulse Train-Continuous-Dig Start.vi in the Example Finder (Help>>Find Examples).  This example starts one counter on a digital trigger, if you create an identical counter task within this VI, and then pass it the same start trigger, both counters will start at the same time, and will be synchronized as long as they share the same frequency and pulse width.

Hope this helps.

Chris_K

[KrisJa]

I have a similar problem to Achim I think.

I posted a possible solution here...

http://forums.ni.com/ni/board/message?board.id=40&thread.id=2779

But still not sure if it would work though...

Cheers,

Kris