CLIP Node XML Generator (CXG)

[Christian_L]

Please provide feedback, comments, and questions on A XML File Generator for LabVIEW FPGA CLIP in this thread.

- David

(posted by Christian on behalf of David)

[CyGa]

Hi !

I've got a small issue using  the CXG.

When setting Min and Max Clock value, sometimes the min value disappears when validating max value cliking outside the box.

Is that a bug or am I doing something wrong ?

[Ching-Yu]

Hi Christian,

I already download CXG utility. However, I don't have vhdl code for test. Could you give me the the example you use (DemoClipAdder.vhd)?

I want to follow your steps in this article "XML Generation Utility for LabVIEW FPGA CLIP Nodes".

Thanks,

Ziva

Message Edited by Christian L on 02-18-2009 11:40 AM

[Christian_L]

 The ClipAdder.vhd file is included in the examples installed for FlexRIO in LabVIEW.

C:\Program Files\National Instruments\LabVIEW 8.6\examples\FlexRIO\FPGA Fundamentals\User CLIP\Adder

[David S.]

Hi zyl7 -

It may be a bug in the UI code. We are keeping a bug list, but I can't give any promises on when (or even whether) the utility will be updated for minor issue fixes.  This application has dual intent:  to automate CLIP XML generation for most users' needs, and also to show how a developer or company might design such a tool for their custom purposes.  You can treat it as a rubric for creating an automated XML generation utility of your own; my recommendation is to download the source and edit it to suit your needs appropriately.

[jakidd]

I just download this and tried running the exe but always get this error after I add the port list and click on next:

Error -2677 occurred at Invoke Node in Simple XML.lvlib:Create Tag - Child.vi->xml_Create Datatype.vi->xml_Create Signal.vi->xml_Create SignalList.vi->xml_Create Interface.vi->xml_Create InterfaceList.vi->xml_Create CLIPDeclaration.vi->XML_Generate XML.vi->CLIP XML Generator.vi

LabVIEW:  Attempted to call Create Element with empty name string.

[jakidd]

Nevermind previous post (I guess you can't edit a message?), I figured this out. I wasnt selecting a datatype.

[sendia]

 

Very useful utility Christian!!

 Just a small suggestion to improve it. Now the CXG doesn't control if the VHDL data type is supported by LabVIEW. It could be a good improvement only display supported VHDL data type in the CXG "unassigned signals" list.

[Emmanuelol]

Hi, i already use this node, but i have some troubles, i used labview fpga, work good but in some applications with some level of complexity consumes a lot of resources and also i'm more famliar with vhdl code, for that reason I have many codes, i would like to use, and this node look a huge option for me, but i tried using this for a code for ps2 keyboard, i'm declare all, when i declare the frequecy of keyboard clock seems all good, when i going to the project and added the ip component element, appears a sign of warning in the icon of ip componet, when i check it, show me all the in and outputs but the clock no appears, can something tell me what is going on? please

[David S.]

Hi Emmanuelol -

This discussion thread is reserved for discussing bugs and features of the CXG utility. For help using the CLIP feature of LVFPGA itself, I recommend creating a new thread in the LV FPGA forum.