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What to Expect When You're Expecting an Error

Connecting error wires across nodes on a block diagram is one of the most common, brainless tasks performed by a LabVIEW programmer. Unfortunately, this often means that VI behavior in an error condition is a second thought, if it's even thought about at all. This presentation will cover best practices in regards to the generation and propagation of errors on LabVIEW block diagrams. You should come out of this presentation with the ability to write VIs that are not only functionally correct in an error condition, but also precisely convey their exact error behavior in an error condition. 

 

The slides were last refreshed in April 2024. You can watch a recording of the presentation here.

 

I have also attached the error responses poster PDF that I discussed during the presentation.

 

(bit.ly/dnatterrors redirects here)

Comments
David_Fanelli
Member
Member
on

Enjoyed the presentation at NIWeek 2018. Thanks.

Blokk
Trusted Enthusiast
Trusted Enthusiast
on

I learned a LOT from this presentation, thanks! Just one example from my many brainless programming habits: I use Clear Errors VIs often, instead of just disabling automatic error handling for VIs... 🙂

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