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Tips for Designing Carrier Boards and RIO Mezzanine Cards for the SOM and Single-Board RIO

ID: TS4337

Abstract: Explore the functionality and architecture of a high-channel-count CompactRIO application. Learn how to overcome the challenges of integrating FPGA and real-time code, hardware-in-the-loop test, and Ethernet network communication into a high-speed, deterministic environment. Also examine deterministic signal acquisition, processing, and generation as well as remote operator control and feedback. Discover the challenges and benefits of CompactRIO hardware integration into an environment that includes VISA instrumentation, third-party software, video production, and multiple user control interfaces. Conclude by discussing the progression from PXI-based instrumentation to CompactRIO-based instrumentation and the future possibilities of these applications.

Track/Summit: Embedded Systems

Speaker(s): Eric Myers, Product Manager National Instruments

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