continuous acquisition crio and send by tcp/ip to computer

[manel549]

Hello

I'm developing a program to make the acquisition of 18 analog signals, using 3 modules 9215, 2 modules 9225 on a Crio 9074. My goal is to send by tcp ip to a computer these signals, at a rate up to 25k. In appendix is the vi that i'm developing. With this VI i'm able to acquire signals up to 5k for more than one minute, but when i'm trying to acquire the same signals at a rate of 25k, i can't have more than 1.2s. I've try to increse the length of my rt FIFO, but if i do that i can't run the program. The values that are in the vi that are in the vi for the rt fifo and for the number of elements to acquire in the dma fifo (750), allows me to execute the programbut if i try to change them i get an error of creting the rt fifo or an error in create a tdms file. I was hoping that someone could explain me what i'm doing wrong,  and what i can do to improve my code. Just one more thing i want to be able to choose whether i want a continuous or a discrete acquisition. When i'm trying to run it in discrete acquisiton i cannot have the desirable points because of the 750 that i use on the dma fifo. 

Best Regards

Thanks in advance

[MatthieuR]

Hi,

Can you give us some screenshot about your errors please? It could help a lot.

Please, have a look about this documents :
https://www.ni.com/en/support/documentation/supplemental/06/using-the-labview-shared-variable.html => Benchmarks, there are some comparaison rate with RT FIFOs between a PXI-8196 system and a cRIO 9012 system (example). In addition, you will be able to find some information about variable and data transfer.

Transferring Data Using Direct Memory Access (FPGA Module)
https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/transferring-data-between-the-fpga-and...

Why is My Real-Time CPU at 100% When Reading from a DMA FIFO (FPGA)?
https://knowledge.ni.com/KnowledgeArticleDetails?id=kA00Z000000P9SASA0&l=en-US

I hope it helps,

Regards,

[manel549]

Hello

I could solve my problem byt replacing the rt fifos by queues, resolving the allocation memory problem. Thanks again for your help. The documents suggested reveal a great deal of help. Thank you.

Best regards