PCI-6281 How to use80 mHZ timebase for A/d and D/A sample clocks

[CyberSmith]

Does anyone know how to use the 80 mHZ internal clock as the timebase for my A/D and D/A sample clocks rather than the default 20 mHZ timebase?

I am using straight NI-DAQmx version 8.3 with C code. No Lab View, no Measurement Studio.

I have an application which uses the D/A to generate a sequence that is collected by the A/D.  The D/A is clocked out at an integral multiple of the A/D clock.  In order to maintain this integral relationship I can only use a limited set of Sample Clock Timebase Divisor pairs (as returned by DAQmxGetSampClkTimebaseDiv).  This means that am further from my desired base frequency than normal.  For example, using the degault 20 mHZ timebase, if I want a 2000 hz center fequency, the closest I can get is 2003.205 hz.

I cannot find anyway to use the 80 mHZ internal clock as the timebase for my A/D and D/A sample clocks.  If I could, it would be possible to get closer to my desired center frequency.

[MickeyD]

Hi CyberSmith,

The only part of the M series board with direct access to the 80mHZ clock are the counter/timer circuits.  The application you are describing it seems like you need the D/A and A/D to simply be sharing the clock.  I am a little unclear why you need to have the integral relationship.  However if you do need to use the the DAQmxGetSampClkTimebaseDiv function to get the time base value then you are going to have trouble getting the exact value you need.  One option would be to simply use the 80 mHZ clock to drive your counter line, and use that as the clock for your D/A and A/D application.  I think I could help a bit better if I had a bigger picture idea of what you are trying to achieve.

When you are saying integrally related are you saying that the D/A needs to be divided down off of the A/D?, because you could simply use another counter circuit to get that behavior.  Using the counter circuitry I am confident we will be able to get this issue resolved, so please help me understand your overall application a little more and how I can continue to help you.

Have a great day,

Michael D
Applications Engineering
National Instruments

Message Edited by MickeyD on 04-10-2007 02:41 PM

[CyberSmith]

Thanks for your reply.

My application is transmitting a waveform and then receiving a response.  The analysis requires the acquisition to stay in lockstep with the transmission over extended periods of weeks or months.  Absolute timing accuracy is not as important as not having phase shifts due to loss of sample clock synchronization.  I use a higher D/A sample clock to produce a smoother waveform and it is always an integral multiple of the A/D sample clock (4, 8, 16, 32, etc.)  A/D samples are collected 4,8,16, 32 times per cycle.  For example, if I want a 2000 HZ center frequency with 8 A/D samples per cycle and 64 D/A samples per cycle, maintaining the 8 to 1 ratio with the 20 mHZ timebase forces the center frequency to 2003.205 HZ.  The 3.205 HZ offset from the desired frequency could be reduced by 4 to .801 HZ if I could go to the 80 mHZ clock for the time base.

I use the A/D start trigger to start the D/A with the following code:

    char    szTrigName[256];

    DAQmxErrChk (GetTerminalNameWithDevPrefix (AOTaskHandle, "ai/StartTrigger", szTrigName));

    DAQmxErrChk (DAQmxCfgDigEdgeStartTrig (AOTaskHandle,
                                            szTrigName,
                                            DAQmx_Val_Rising ));

I would have to use one counter for the higher frequency D/A sample clock and also route it or the output of the first counter to a second counter to divide it down for the slower A/D clock.  If this makes sense could you tell me how to do the signal routing and what to call the devices and terminals?

I appreciate your help.

Thanks,
David W Smith

[Brad_K]

Hi David,

You should be able to create two continuous pulse train generation tasks for two different frequencies based on the code in Examples\DAQmx ANSI C\Counter\Generate Pulse\Dig Pulse Train-Cont. Then when you call DAQmxCfgSampClkTiming() for your AI and AO tasks, specify /Dev1/Ctr0InternalOutput and /Dev1/Ctr1InternalOutput for the "source" parameter, respectively on the two AI/AO tasks (assuming that Dev1 is the name of the device). This will make the AI and AO tasks use the counter outputs as their sample clock sources.

Note that a finite pulse train requires the use of both counters, but a continuous pulse train only uses one. For this reason, you will need to use continuous pulse trains if you need two different sample clocks generated based on the 80 MHz timebase.

I don't know if we have an example program that shows how to do exactly what you want to do, but some of the stuff linked to by How Can I Perform a Retriggerable Acquisition? might be illustrative, since analog input triggering on E/M Series requires using a pulse train from a counter as the source of the AI sample clock. Some examples showing how to use an external sample clock may also be useful.

Brad

[CyberSmith]

Hi Brad,

Thanks twice for your replies.  I notice that you were the one that answered my other post.

Your suggestion should work fine.  Continuous pulse trains are fine, any restart can accommodate the overhead of setting up again.  I believe all I have to do to restart after a call to DAQmxStopTask is make a call to DAQmxStartTask. It is not necessary to start relative to an external trigger.

Thanks again,
David