02-14-2008 04:55 PM
02-15-2008 06:28 PM
Hello Eyal,
Let me rephrase what it is I think you want to do:
1. You have a digital input with a frequency at or approximately 75 kHz.
2. You want to divide down this input frequency by N, where N is between 10 and 50 or so.
3. On every Nth pulse you want to generate a pulse with a 200ns high time and then return to a low state until the next 200ns pulse is generated.
If this is what you want to do then you would need 1 CO task to generate a pulse ever Nth rising edge of your input. Then you would use this pulse to trigger a retriggerable pulse train to output your 200ns pulse. All of this routing can be done internally so you would only physically connect one input and one output, however this setup would require three counters. One counter for the CO task and two counters for retriggerable pulse generation. Unfortunately your PCI-6251 only has two counters so to do this you would need to get a board with at least 3 counters.
If I didn't describe what you are trying to do accurately please reply back with further clarification incase what you are actually trying to do can be accomplished on your board.
If you would like to contact National Instruments directly to speak with a technical representative about getting a counter board you can find contact information at www.ni.com/contact.
Have a good weekend!
02-18-2008 02:14 PM
You can do it with just your board's 2 counters if your retriggerable pulse generation is set to do retriggerable SINGLE pulses rather than a retriggerable finite pulse train. The only difference in the config is that for single pulses, you wouldn't include any calls to DAQmx Timing in the config chain.
-Kevin P.
02-19-2008 05:20 PM
Hello Eyal and Kevin,
It looks like Kevin is correct. I built up an example code to test this on my PCI-6251 and I have confirmed that it will work as he says with two counters for a single pulse. I've attached the code I used for testing. You'll need to verify that all of the channels are chosen correctly for your hardware configuration, but after that I think it should work. As it is written I send digital pulses in on PFI0. Then, based off the rising edges received on PFI0 counter 0 outputs a rising edge every 2*N pulses it receives. The output of counter 0 will go high for N ticks and then low for N ticks thus generating a rising edge every 2*N ticks. This rising edge is the start trigger for the pulse generation. In my VI the default pulse width is 1 second with a duty cycle of 50%--you’ll need to modify this to be 200ns.
Thanks Kevin, and good luck Eyal!
Cheers!
02-19-2008 07:10 PM
02-20-2008 11:44 AM
I've saved my VI back to LabVIEW version 8.0. Also, please note that as it is written, it is actually dividing down by two N and not N. It would be possible to make it divide down by N, for N > 4, if you make either high or low ticks a constant 2 (high and low ticks must be at least 2) and then use the control for the other input. Doing this would generate a rising edge for the pulse start trigger ever N rising edges of your input signal, where N is 2 + the value of the control.
Cheers,
02-25-2008 12:45 PM
03-11-2009 03:06 PM
Thanks alot Brooks,
your example helped me understand the counter VIs a lot better.
Tobias