Want to use external clock for SCTL on myRIO

[numbersofpi]

Hi people,

I'm trying to find a way to get a 2.5 MSPS 16-bit ADC, TI ADS1602, to send data to the myRIO device. Ideally, I want to record bits at 40 MHz in order to get the benefit of the full 2.5 MSPS. I know that I can create an 80 MHz SCTL on the FPGA to create a 40 MHz clock, but when I checked this clock signal on an oscilloscope it was obviously significantly degraded by slew rate limitations, so it looked more like a sine wave than a square wave. I doubt that it would work to use this signal as a clock to drive the ADC, since the ADC's specifications say the allowable jitter is around 100ps.

I can use an external oscillator to drive the ADC, but then I have to find a way to sync that clock with the 40MHz FPGA clock. Is there any kind of PLL structure that would allow me to sync the myRIO FPGA clock to an external clock? Is there a way to make a single cycle timed loop be driven by an external clock? Or if I was able to customize the FPGA personality to accept an SPI signal of up to 40 MHz (ten times the officially supported limit...), would it be ok to use an FPGA loop running at ~160 MHz and tell it to sample the SPI line each loop and proceed from there? 

Thanks!

[tannerite · Accepted solution]

Hi 3.14159... ,

The myRIO does not have the ability to import a clock to use on the FPGA Block Diagram to clock single-cycle timed loops (SCTLs). The new sbRIO-9651 that just released at NI Week (not shipping yet) is the only sbRIO that has the ability to import an external clock into LabVIEW. Several of our FlexRIO products also have this ability.

As you alluded to, you can sample the signal at twice the frequency (or possibly more) to and wait until an edge trigger to execute a certain piece of logic. If you open the Example Finder and navigate to Hardware Input and Output » R Series » FPGA Fundamentals » Triggers and Watchdog » Trigger Detection this gives a simple example of doing that. Again, since you are wanting to sample at 10x the supported frequency, all bets are off but it may be worth a try.

[numbersofpi]

Hi Tannerite, 

Thanks for the information about the new sbRIO. I'll develop some tests for using a faster SCTL to check for triggers, but if that doesn't work well enough then I'll look into purchasing the new sbRIO when it's available.

[tannerite]

No problem. One thing to keep in mind is that the new sbRIO-9651 is a system on module so a carrier board must be created to interface with this product. This adds flexbility for our customers but also a higher point of entry as a carrier card must be developed. I just want to point that out as the myRIO is a plug and play type of device whereas the sbRIO-9651 is not. There is a development kit for the system on module that allows you to protytpe however. Here is the link to ni.com for your reference (you can find the development kit there as well):

http://sine.ni.com/nips/cds/view/p/lang/en/nid/212788