Real-Time Measurement and Control

cancel
Showing results for 
Search instead for 
Did you mean: 

While using the SOM 9651, we want to wire up a display other than the recommended amulet

I want to use a SOM running Labview RT on a linux platform.  I need to have the SOM interface to a VGA display.  How do you configure the OS settings to identify which FPGA lines are used for the display?

0 Kudos
Message 1 of 4
(2,871 Views)

Hello id

 

Just to make sure: When you say "How do you configure the OS ….?" Did you mean Linux RT?

 

You should see that information when you are creating the VI in the FPGA. There you select each pin you need.

 

However you can launch the sbRIO CLIP Generator for:

  • Generates processor peripherals
  • Configures the raw FPGA I/O pins
  • Generates a LabVIEW fpga i/o Node interface for the socketed CLIP.

 

See the links below.

http://zone.ni.com/reference/en-XX/help/373197D-01/sbriohelp/9651_start/ (See the bullets at the end)

http://zone.ni.com/reference/en-XX/help/373197D-01/sbriohelp/9651_clip/   (sbRIO CLIP)

https://decibel.ni.com/content/docs/DOC-41410 (Clip Generator)

 

If you already has the connection you can follow the routing from the J1 connector using this document

 

http://www.ni.com/pdf/manuals/376962b.pdf (page 33)

 

Hope this information might be useful

 

Regards,

0 Kudos
Message 2 of 4
(2,835 Views)

Thanks fo rthe info especially the clip thing but I cant see it because I havent bought the SOM yet. 

 

How do you program the VI to drive the video  out?  Are there libraries or something available for VGA or LVDS?

 

0 Kudos
Message 3 of 4
(2,827 Views)

Hey,

 

If you install the drivers for the SOM, you should be able to start playing around with setting it up in a LabVIEW project. (Just add a new device under the top level of your project).

 

Regarding VGA, you should be able to modify this example to work for you.

 

VGA Device Driver for FPGA Applications

https://decibel.ni.com/content/docs/DOC-6741

 

Once you configure the digital lines in the CLIP configurator, you'll be able to write boolean values directly to the digital lines in your FPGA code.  So you can send an array of pixels for each frame from your RT VI down to the FPGA, and have the FPGA send them out.

0 Kudos
Message 4 of 4
(2,809 Views)