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PWM FPGA

Hi guys,

I'm developing a PWN on my crio-9066 fpga with ni-9403 module.

This is my code:

pwm-fpga.png

 

but I can't get a pwn signal all high with 100% duty, and all low with 0% duty.

How to improve this? I have to use the single cycle timed loop? How? (I can't use the FPGA I/O node in a SCTL)

Thanks

 

 

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Message 1 of 10
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Something like this?

pwm2.png

You can set duty to 0 and then it will always output false and if you make duty bigger than period it will always output true.

 

For future reference, if you needed to transfer information between loops (not needed in this case) you can use a local as shown in the bottom loop.

Message 2 of 10
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Uhm. Are you sure? In the shift register what kind of integer do you have? It's doesnt the ticks count of the main clock. I get a delay of 50 us each semi period. 

Anyone help?

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Message 3 of 10
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All integers in that block diagram are U16. The size isn't too important and you could change them all to U8 or U32 depending on what your max period is.

 

 

Is 50 us increments of period unacceptable? The maximum write rate is dictated by the card and it should be 7 us

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Message 4 of 10
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Ok but what kind of unit is the integer? The processor ticks? I think no.....

 

I can't speed up than 4kHz. I need 8kHz PWM. Is it possible?

 

The module have 7us of commutation time, so I can have up to 70kHz PWM, right? 

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Message 5 of 10
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This is the max frequency that i can get out (4,59kHz / 50% duty):

DS1Z_QuickPrint4.png

 

 

This is the pwm with 0% duty (I have 50us high per period):

DS1Z_QuickPrint2.png

 

 

This is the pwm with 100% duty (I have approximately 50us low per period):

DS1Z_QuickPrint3.png

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Message 6 of 10
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Something like this should/could work; PWM frequency is fixed to 8 kHz:

Dutycyle 0<x<100:

grafik.png

Dutycylce = 0:

grafik.png

and another case for Dutycylce = 100 where the output is always TRUE.

Of course you can transfer just the high-time instead of the dutycyle and change the conditions for the case structure.

 

Regards, Jens

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Message 7 of 10
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thanks jg69, but I need variable pwm frequency fron 600Hz, up to 8kHz.

I'm thinking hard about it!

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Message 8 of 10
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OK, then make the Loop-Timer a variable, too.

Regards, Jens
Kudos are welcome...
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Message 9 of 10
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The top loop should run at approximately 7us per cycle. So if you put a 0 in for the period the shift register should just toggle between 1 and 0 giving you a period of ~14us for a ~71kHz frequency. If you put in a duty of 0 you should get 100% low, if you put in 1 you should get 50% duty, and if you put in 2 you should get 100% high.

 

What values are you using for period and duty in my example to get what you see on the scope. Please delete the bottom loop for your test. It was just to demonstrate how you might use a local.

 

 

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Message 10 of 10
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