12-28-2005 02:29 PM
12-28-2005 03:02 PM
This is a good question. The short answer is that if you program the device to use STROBE, it will clock the hardware at the rate you input to the STROBE line. However, when you program the device to use STROBE, you still need to specify the frequency at which that signal will be toggling. There are certain software features that require a frequency component in the math. The value you input to these clocking functions will NOT overwrite the frequency you input to STROBE, it only makes sure the hardware is set up correctly to receive a clock at that rate. For example, if you tell the software you want to run at 25MHz but input a signal at 2.5MHz, the hardware will not be setup ideally for 2.5MHz and may produce errors. Does this make sense?
Questions:a. When I use the niHSDIO Configure Sample Clock.VI and select STROBE as clock source, do I need to specify the clock rateif I do need to, then does the PXI 6562 use the clock rate I had specified or that it had detected from the external clock?
I don't think I completely understand your question. The channel electronics don't distort duty cycle. As the data passes through the front end the data is sampled using the clock you specify. If you are providing a source synchronous clock from your DUT to the 6562 and telling the HSDIO driver to use STROBE then all channels will be sampled on either the rising edge, falling edge, both edges, or on a delayed version of the rising edge of the signal you input STROBE. There are specifications that deal specifically with a signal input to STROBE which you may want to verify, especially if you are operating at high frequency. A copy of the specification should have been installed with HSDIO and can be found under:b. How can I read digital patterns of varying frequency but 50% duty cycle with out losing or distorting the duty cylce of every signal?
12-28-2005 03:53 PM
Thanks for replying promptly.
I probed the output terminals of my DUT using oscilloscope and they seem to meet the expected digital pattern.
The acquired data using my application agrees with that of the device's test panel.
I can safely assume that the VI's used in both my application and test panel come from the same set.
So the niHSDIO Read Waveform.VI is so primitive that I only have its parameters to play with.
Is there any other way of acquiring data than the above mentioned VI?
Is there a significant propogation delay resulting from the difference in the strobe and data channel traces inside the PXI 6562?
Perhaps the signal coming through the strobe may pass through more or less logic circuits than that of the channel lines.
12-28-2005 04:09 PM
12-28-2005 04:14 PM
12-28-2005 07:46 PM
I have a custom cable adapter build to present the signals from the DUT to the PXI. At the same time there is a break out point where every signal in the infiniband connector is routed to access points. so I am capable of probing all data channels, triggers and clock input and output pins.
The Mictor to infiniband adapter is characterized and properly terminated and tested to work correctly.
I am attaching a copy of my labview code. The NI-HSDIO Express (Acquisition) VI is used to compare acquired data with what the niHSDIO Read Waveform.VI gives me.
12-29-2005 09:21 AM
12-29-2005 02:24 PM
I understand that I can't export the clock when I am using strobe and I learned from your last posting that 48MHz frequency is coerced to 50MHZ when using on board sampling clock. That answered a lot of questions.
None the less, if there was a timing issue between when the sampling gets to the acquisition logic circuitry when it gets to my DUT and the data propagates to the PXI interface, then shouldn't I see the duty cycles trend closer to 50% as I observe the plots from the LSB to the MSB channels?
12-30-2005 09:10 AM - edited 12-30-2005 09:10 AM
Message Edited by Ryan M on 12-30-2005 09:11 AM
12-30-2005 01:04 PM
Ryan I've good news,
Al along it was my conncetion between the DUT and the 6562, there was a tremedous crosstalk between each differential pair. I was using single ended signaling and had the unused pair suspended. So any noise on the inactive link was causing the active one to switch state, hence preferring to stay high than low most of the time. To fix the problem, i am sending the compliment of each intended signal on the unused pairs. so the two signals are transitioning at the same time but when one goes high the other one is going low, that cancels out the contribuition of each signal to the other and vise versa.
Now that I have cleared that issue, is there an accessory cable I can buy that allow me to establish single ended communication channel. that is to say ribbon cables or parallel lines instead of twisted pairs?
Thanks for every thing.