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03-18-2016 01:23 AM
I'm simulating a buck converter, and I'm having a problem where the NMOS gate is only turning on for a tiny spike of time. For this schematic, the circuit is set up for a 50% duty cycle with a 20 us period. So the gate should be on for 10 us and off for 10 us. Instead, it's closer to 80 ns.
This is what I would expect if this were a practical circuit using a non-isolated gate driver. But in this case, I'm using what appears to be an ideal voltage source referenced to the NMOS source. I wouldn't expect this problem.
Any ideas what the problem is?
Schematic: http://i.imgur.com/GAwWNnQ.png
Gate Voltage: http://i.imgur.com/fjU32Uh.png
Source Voltage: http://i.imgur.com/NBQUyNr.png
V_gs: http://i.imgur.com/ZX7BOKk.png
03-18-2016 06:30 PM
It is difficult to tell from those images. Many participants on the Forums will not loo at images posted to third party web sites. Please post the image directly here using the "insert/edit image" button in the toolbar at the top of the textbox where you type your message.
My guess: The source voltages rises (due to L*dI/dt) to approximately the power supply voltage (100 V). With zero volts drain to source no more current flows so the voltage drops back down. 80 ns seems reasonable for the inductor and voltages. Is there some steady state current flowing after the spike, perhaps a few mA?
Lynn
03-19-2016 10:59 AM
The issue was spotted - the default values for the channel width and length of the mosfet were not capable of handling the current that had to flow through it. The channel width had to be made significantly larger than the length. Once that was done, the circuit behaved as it should and the mosfet stayed open for the full duty cycle.