03-06-2006 03:52 AM
03-07-2006 06:03 AM
Hi,
the principle would involve the use of the terminal count as a trigger to the analog output clocking.
The problem is that you need one counter to make the trigger event for the terminal count, and reset it, and another two counters to make a finite retriggerable pulse train, so that you could make a retriggerable analog output section. You haven't said what M-series card you're using, but if you're the same person who's e-mailed into the uk office aswell, then it's a 6251, which only has 2 counters, so you cannot acheive this on this board alone.
have a look at the following link (which is for analog input) for how to use the terminal count.
It should be a simple convert to get to the AO instead of AI, and you would need three counters on your board, or a couple on a second board plus a RTSI cable to connect them together and adding in the retriggerable finite pulse train generation (there's shipping examples of this)
The synchronisation of the timing will have a fixed delay, so if you need very high (ns) resolution on the timing, it's not going to happen that fast.
You must have a specific length pulse duration too for the card to trigger correctly which matches the specs. (i.e. TTL is equivalent to 20MHz = about 50nS).
Without specific timing information, then it's going to be a case of trying it.
Thanks
Sacha Emery
National Instruments (UK)
03-07-2006 06:04 AM
Hi,
should have said - the Analog output section would have to be set as continuous, and therefore the retriggerable pulse train would be the clock source.
Thanks
Sacha Emery
National Instruments (UK)
03-17-2006 05:00 AM
Hi,
a slightly different approach works better, and acheives all this on one card, plus a bit of external wiring.
Given the defaults on the front panel of the attached vi, it uses the external incoming clock on PFI0 to clock out a digital pattern so that on the 10th clock pulse, you get a 1 for example, i.e. the pattern is 0000000001.
This output needs hardwiring to PFI1 to be used as the trigger source for the finite retriggerable pulse generation on the counter (internally using the second onboard counter since it's finite).
The internal counter output is then used as the clock source for a continuous analog output task, so you get fixed bursts of information every nth clock pulse.
Hope that helps
Sacha Emery
National Instruments (UK)
03-22-2006 07:08 AM
Hi,
just got an e-mail directly from the original poster of the question here :
It is running and doing what its supposed to, however , the pulsewidth of the digital pulses is equal to the period of the incoming 30kHz signal. Is there a way to vary the pulse width of these digital pulses so that they are high for longer giving longer "bursts". I have also posted this question one of the discussion forum.
The pulses generated on the digital line are orcestrated by the pattern you generate.Is that what you're trying to acheive?
Thanks
Sacha Emery
National Instruments (UK)