Multifunction DAQ

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Intermittent Error -200019 with External Clock

I am acquiring in-cylinder pressure data from an engine, and I receive the following error intermittently:


Error -200019 occurred at
Possible reason(s):
ADC conversion attempted before the prior conversion was complete.
Increase the period between ADC conversions. If you are using an external clock, check your signal for the presence of noise or glitches.
The external clock is the A-pulse from a quadrature encoder on the engine crankshaft. The cable from the encoder is shielded and grounded, and it is run inside of a shielded and grounded conduit. The signal passes through an optical isolator immediately before entering the BNC-2090A connector block. The 2090A is connected to a PCI-6143 DAQ with a 5 meter SHC68-68-EPM cable. When I connect an oscilloscope to the 2090A (while the VI is running), all encoder signals are a clean 5V square. The VI will run fine for an arbitrary length of time before being interrupted by the error above.
I have looked about online for this error code, but in most cases people have noisy signals or are trying to sample at too high of a rate. Noise in the signal doesn't seem to be the problem, and the sample rate per channel that I would encounter is 36-108 kS/s (600-1800 rev/min at 3600 pulses/rev), while the DAQ supports up to 250 kS/s/channel. Therefore, I am thinking that there is either a hardware problem with the DAQ, or something is wrong with my implementation. I have attached a simplified version of the offending VI.
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Calling a signal "noisy" is all relative.  There isn't any built-in hysteresis on the PFI lines so if there is even a small glitch around the transition point the DAQ card might pick it up as two edges which are very close together.  Many newer NI-DAQ products support digital filtering which can be used to fix this issue, but the 6143 doesn't have this feature unfortunately.


If you have a counter available you could issue a retriggerable pulse, triggered by your encoder A signal.  Sample the analog input off of the counter's internal output.  While the pulse is being generated it will ignore any extraneous rising edges on the input line, so the duration must be short enough that the counter is re-armed in time for the next rising edge.  A 6 us high time and 100 ns low time would accomodate up to a 164 kHz signal.  Ideally you'd want the counter to stay high through the rising and falling transitions of the encoder (when the DAQ card is going to be susceptible to picking up false rising edges).



Best Regards,

John Passiak
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