Hello to all,
my application is supposed to be the periodical acquisition (1kHz-clock) of 4-byte-packages
at port 0 (digital channnel consisting of 8 lines representing 8 bit) of an PCI-6251 DAQ-card of NI over a time of 18sec.
Each byte should be read in triggered externally by the rising edge of a clock signal (4 clock pulse burst) at the boards PFI0 input . So the external trigger signal has the form of a periodical pulse train consisting of 4 clock pulses, that is repeated every ms (signal shape see in the attachement, bottom). The trigger signal levels meet the TTL specifications.
How can I accomplish this? I tried just everything without success, even vi-examples for that and different configurations (sampling rate, etc.). I don`t get read in consistent data, it seems that the board doesn`t react to the trigger in the right manner and that some bytes get skipped so that the results of the subsequent processing of the data leads to false results.
The application worked once at a pulse frequency of 200Hz (see application vi attached). Is it possible that the hardware reaches its limitations at 1kHz?
What are the restrictions to the digital trigger signal (edge, pulse width).
Some further data of the trigger signal (apart from the picture):
Width of each clock pulse is only 250ns, the pulse-to-pulse period (within the train) is 5,85µs, the time period between each pulse train is 1ms. Could this make trouble for the DAQ trigger acquisition?
I can`t allocate the problem distinct to the programming or to the hardware. Is my DAQ board not capable to handle this measurement task?
Thanks in advance for your help,