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data transfer from FPGA to computer host to spreadsheet using DMA FIFO

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I could use some help with the DMA FIFO to transfer data to the computer host VI. I'm using a FPGA system USB-7855R. My device has DMA capabilities. 

 

My goal is collect input analog voltage data from an experiment and then when the experiment is done (I press stop), write that data to a spreadsheet. There will be some other logic in the FPGA part of the code to help with timing for my intended application later, but I'm excluding that to help simplify the debugging process. 

 

My understanding is that I just need a DMA FIFO Write in the FPGA Target VI and a FIFO read in the Host VI to collect the data, but my wires have an error to say the Reference FPGA doesn't match the FIFO data type. One of the examples I'm following is at https://forums.ni.com/t5/Example-Programs/Transfer-multiple-channels-of-data-through-one-DMA-FIFO-on.... Once I have stopped running my FPGA, I would like to collect all of the data into an array in the host VI. To summarize, my questions are (1) How do I write data from the FPGA to the Host VI on my computer correctly? If possible, I would just like to collect the data at the end of the experiment rather than communicating with the computer during the experiment. (2) How do I take that data transferred to the host VI on the computer and write that data into a spreadsheet? I attached screenshots of the code. Thank you for your help. 

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Accepted by topic author mdot

Hi mdot,

 

about your FPGA vi, note that if you want to send single analog input data per single loop cycle, you do not need to create an array and have a for loop.

 

Regarding the broken wire, I see you dragged the FIFO from project to the block diagram of Host vi. Instead, you should use functions from FPGA Interface palette, in this case it is Invoke Method function.

 

If you want to collect fixed amount of samples, you can stop the FPGA loop after certain number of operations. Then, on Host, you can implement blocking architecture or polling architecture (see: Element Remaining output) for reading the data:

http://zone.ni.com/reference/en-XX/help/371599L-01/lvfpgaconcepts/fpga_dma_best_practices/

http://zone.ni.com/reference/en-XX/help/371599L-01/lvfpgaconcepts/fpga_dma_program_architect/

 

To save data to a file, you may use functions from File I/O palette. If you go to Help -> Find examples... you will find many nice examples from NI.

 

Hope this helped you a bit,

Anna

 

 

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Thanks for your help. I didn't realize that the Host VI DMA FIFO block needed to be created in the block diagram instead of from the project menu and I'm able to collect the data and save it into a spreadsheet. 

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