02-08-2008 04:45 AM
02-08-2008 09:52 AM
02-12-2008 11:29 AM
02-13-2008 06:43 AM
Hi Rich,
I am familiar with VIC. I have managed to get a Handle to the device in MAX and am able to read some of the configuration registers in both LabVIEW with VISA low level peek and poke and in VIC. Im afraid my problem lies more in my limited knowledge of the PCI Register mappings. From What i have read, i think i need to know wehre my FPGA Base address resides. This Base address is in either the BAR0 or BAR1 registers within the PCI Configuration registers (Which i have access to). From playing around i think i have found that i have to do something along the lines of the following.
-Map the PCI Configuration register
-Read BAR0 and BAR1, find out which one is the FPGA.
-Unmap the PCI Register.
-Map appropriate BAR0 or BAR1 address's
I Think this will enable me to have access to the FPGA registers starting at Base address 0x0 from there on in.
Thanks for having a look though, I will also point towards this thread from the DDK forum and hopefully get some more information on this.
Thanks again
Craig
03-28-2011 05:24 PM
Craig,
Did you ever get this figured out? I'm trying to do the same thing now.
Thanks,
Josh
08-01-2011 06:05 PM
Hi,
I didnt notice this post as I have not frequented the forums for a while and only noticed by looking through my old posts (This ones approx 3 years old!). Yes I did get it working. I cant exactly remeber but I think BAR0 registers are things to do with the PCI Bus itself and BAR 1 is the start of the user defined register space. I remeber it was actually quite easy as all I needed to do was to write down to BAR1 Base plus my Register offset. I Know it is a really late reply and a bit vague however I done this job as a contractor over 3 Years ago and have no access to the code. However if this reply helps you or any others out in anyway so be it 🙂
Craig
08-01-2011 06:09 PM
Craig,
Thanks for the reply. I figured out my problem was related to the endian of everything. Even though I was told that VISA uses big endian, and was told the PCI card I was using required big endian, I had to do a byte swap to get things to read and write properly.
I'm not entirely sure why this is. My theory is it has to do with windows swapping everything internally somewhere along the way or possibly the PCI bus assuming it is little endian coming from windows and swapping it