FPGA debounce on lots of lines

[GregFreeman]

I have found this example here on having a debounce filter on FPGA. However, I have an issue where we are monitoring 768 digital lines (really only monitoring a fraction of that in terms of physical lines coming into our cRIO, but we have an external multiplexer we are driving to read all 768 external lines) but I am not sure how to handle it without dropping down 768 instances of that VI. This sounds like a nightmare. Is there any way I can manage this in a for loop somehow, maybe maintaining an array of counts for each line and the previous input signal for each line? My lack of a full understanding of feedback nodes may be part of the problem here (admission of guilt...).

[GregFreeman]

I kind of got lazy and jumped the gun here...I think I can implement the same code but just turn everything into arrays and use index array, replace array subset on a per line basis. Am I wrong in my thinking here?

[Intaris]

Depends on your speed requirements.  Dynamic indexing of arrays gets expensive when the arrays get large.

You might be better dropping X instances of a VI if the VI contents are not complex.  I would recommend putting 16 VIs in another VI (all inlined) and scale up from there.....

PS Registers are cool for this kind of thing, but you CANNOT put a register reference in an array, clusters only.

Shane.