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Disabled multicore support in LabVIEW FPGA

Hi all

 

I use LabVIEW FPGA for the first time and "compiled" my first project. I know that synthesizing, mapping, PAR, … take long time, but I was surprised about the low system load this steps generate on my machine. A deeper look into the Xilinx compilation process reveals that synthesizing uses only one core. This is what I see in the task manager. But for mapping and place & routing all cores can help compiling. http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_4/devref.pdf shows how to enable this with the “-mt” parameter. The interesting point is, that LabVIEW FPGA disables multicore support for these compilation procedures. If you look at the generated Xilinx log, you will see the following command line calls:

 

Command Line: map -intstyle ise -p xc5vsx95t-ff1136-1 -w -logic_opt off -ol high -t 1 -register_duplication off -global_opt off -mt off ...

...

Command Line: par -w -intstyle ise -ol high -mt off ...

 

Why is multicore support disabled? I think this should noticeable reduce the compilation time.

The more interesting question is: Is there a way to enable it? I didn’t found an official way to do this. I played around with the .psg files. But NI don’t like such “hacks”, so I decided to ask the community.

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I don't know how true this is, but I was once told that the compile time for the FPGA is most dependent on the amount of RAM available to the compiler, and that processing speed had less to do with it.  I say I don't know how true it is because I have heard of a 4 core machine maxing at 25% CPU usage, which would suggest to me that one core is maxed out, and that if it could off load any work to another processor the compile time would decrease.

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That’s true for larger designs. But for my little project there’s lot of free memory. My system shows ~10% CPU usage. This looks like a task running on a single core instead of using all 8 available cores

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