Examples and IP for Software-Designed Instruments and NI FlexRIO

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SPI Example for the NI PXIe-5644R


SPI Example for the NI PXIe-5644R »

This example implements serial peripheral interface (SPI) communication through the DIO port on the NI PXIe-5644R, including support for both master and slave functionality.

Description: Serial Peripheral Interface (SPI) buses are commonly used to communicate between a controller (master) device and a target (slave) device. In general, SPI buses require four lines for communication: chip select/clock enable, serial clock, master serial data out (MOSI), and master serial data in (MISO). In some cases only a subset of these lines are used; some devices multiplex both MOSI and MISO onto a single bidirectional data line. This example includes LabVIEW FPGA code for both an SPI master and an SPI slave.

Additional Documentation:

  • After Installation - C:\Program Files (x86)\National Instruments\LabVIEW 2012\examples\NI SPI Example for the NI PXIe-5644R\Documentation\NI 5644R Serial Peripheral Interface (SPI) Example.pdf



FPGA Footprint:

Xilinx Virtex-6 LX195T

  • 4.9% / 6116 LUTs
  • 3.3% / 8256 Flip-Flops
  • 1.2% / 4 Block RAMs
  • 0.0% / 0 DSP Slices
  • ~100% compile success rate

Latest Version:

Previous Versions:

  • none available

Note: All source on this community is distributed using VI Package Manager (VIPM). For more details on VIPM, please read A Note on VI Package Manager

Ryan Verret
Product Marketing Engineer
Signal Generators
National Instruments

Will this example be available for LabVIEW 2015 anythime soon ? I could not install this version on my system...