Channel Emulation IP »
This IP implements inline, real-time DSP in LabVIEW FPGA to apply arbitrary channel models to RF data. Fading profiles are computed in real-time on the host, and dowloaded to the FPGA where they are interpolated and applied to the data stream.
Description: This IP emulates an over-the-air (OTA) channel for a wireless communication link. By combining floating point host code and fixed point FPGA code, the channel emulator provides flexible channel profiles and models that can be easily added to and/or modified. It provides two custom channel profiles which are deterministic and stochastic with multiple input multiple output (MIMO) configurations.
Xilinx Virtex-6 LX195T
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