Example Code

PCIe-1473R LX110 10-Tap 8-bit Camera with DRAM with Virtex-5 LX110 Example Project

Overview

This project is a modified version of the 10-Tap 8-bit Camera with DRAM shipping example, for the PCIe-1473R-LX110 FPGA CameraLink FrameGrabber. The project has been configured to use the PCIe-1473R with the larger Virtex-5 LX110 FPGA, where the shipping example is configured to use the standard PCIe-1473R with a Virtex-5 LX50 FPGA.

Description

This example demonstrates how to acquire images from a 10-tap, 8-bit, extended configuration, Camera Link camera and display the images on the host. This example supports area scan and line scan cameras for both continuous and finite acquisitions.

This example also demonstrates the use of DRAM as a frame buffer for very high speed acquisitions. Data packing and flow-control are also employed to maximize use of the available DRAM and FIFOs in terms of both memory space and performance.

Additionally, the example demonstrates the serial server, which allows third-party camera configuration utilities to communicate with the camera using the Camera Link serial interface while this VI is running.

Steps to Implement or Execute Code

  1. Download and unzip the attached file.
  2. Install PCIe-1473R-LX110 into computer and attached CameraLink camera to Port 0 and Port 1 of framegrabber.
  3. Open project and compile FPGA VI.
  4. Open 10-Tap 8-bit Camera with DRAM(Host) VI, select FPGA on PCIe-1473R, configure acquisition settings and run the VI.
  5. Confirm that images are being acquired.

Requirements

Software

LabVIEW 2014 or later

LabVIEW FPGA Module 2014 or later

LabVIEW Vision Acquisition Module 2014 or later

Hardware

PCIe-1473R-LX110

Download Link (Size: 354 MB)

https://drive.google.com/file/d/0B9-DkLZ_BGmUVEh3aXZnMk5kNVU/view?usp=sharing

Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.

Comments
AmitShachaf
Member
Member
on

I am working with NI PCIe 1473R-LX110 in my project. I am using a different camera then this Basler camera curently. Recently I have been looking to move to the Basler camera with the Cimosis CMV2000  Sensor that has 10 Taps.

Basler isn't recomanding to use this camera in 10Tap mode. They recomand maximum of 8Tap mode.

My issue:

I see the code is using CLIP that Pack the data from 80bit to 256bit and from 256bit to 64bit.

How do I create packer like that for difrent Tap configuration.

Thanks - Amit,

Amit Shachaf
kcjin
Member
Member
on

Dear,

Hello~~, I'm Mr. Jin and got the error message attached below.

---------------------------------------------------------------------

You must reload the DRAM declaration file.

    FPGA Target 2 (RIO0, PCI2-1473R-LX110)

---------------------------------------------------------------------

I selected DRAM Bank0 and Bank1 and then reloaded but the error message was appeared.

How can I solve that ?

Best wishes,

From Jin ( kcjin000@gmail.com )screenshot_20160826_NI.jpg

fblerg
Active Participant
Active Participant
on

Hey Amit,

I would probably go with Basler suggestion to use 8-tap. I have not configured a project for 10-tap before. You will want to post on the forums since someone probably has done this before, and could save you the time.

http://forums.ni.com/t5/Machine-Vision/bd-p/200

Thanks,

Frank

fblerg
Active Participant
Active Participant
on

Hi Jin,

I have not seen that error before. I would try the forums also: http://forums.ni.com/t5/Machine-Vision/bd-p/200

Thanks,

Frank

AmitShachaf
Member
Member
on

Hi Frank, I was asking specifically on the CLIP used in this example to pack the data from 80bit to 256bit. How did you configure this CLIP? It is in the code?  Thanks - Amit,

Amit Shachaf
nikcjin
Member
Member
on

DRAM Bank 0, DRAM Bank 1 is component-level IP.. Where is located ?

Pack80 to 256 and Pack 256 To 64 are located C:\Program Files (x86)\National Instruments\LabVIEW 2014\examples\Vision-RIO\Common\CLIPs...

Best Regards,

From Jin

AmitShachaf
Member
Member
on

Do you know how to create a new CLIP with different Packing / Unpacking configuration?

Amit Shachaf
DarkLordOfG
Member
Member
on

Does this example work with interlaced or section tap configuration cameras in 10 tap - 8 bit?

 

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