Digital I/O functionality of the PCI-6602 RLP

[Jasmine1688]

Hi,

I know this is a very old post. I am doing register level programming on a 6602 board. I don't use those PFI lines but am curious how to program them.

These registers mentioned in one reply, 0x500, 0x504, where are they? I cannot find them in this document:

http://digital.ni.com/manuals.nsf/websearch/4CE1C778F442B01386256C870060F9F3

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@JoeFriedchicken wrote:

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For static output on the correlated digital lines, you'll need to program three registers.

1. TO_StrobeReg at offset 0x500
2. TO_ConfigReg at offset 0x504
3. TO_InitValReg at offset 0x510

TO_StrobeReg at offset 0x500

TO_StrobeReg is 32 bits wide, and has these fields:
30: TO_SWEnable
29: TO_SWDisable

Writing 0b1 to TO_SWEnable will enable output generation, and writing 0b1 to TO_SWDisable will stop output generation.

TO_ConfigReg at offset 0x504

TO_ConfigReg is 32 bits wide, and has these fields:
13..12: TO_StopMode
2..0: TO_Format

Set TO_StopMode to 0b00 to tell the TIO to stop generation on the state of TO_SWDisable.

Set TO_Format to 0b010 to tell the TIO to use immediate updates on the output pins.

TO_InitValReg at offset 0x510

TO_InitValReg is 32 bits wide, and has only one field:
31..0: TO_InitVal

This field holds the data that you want to output. Since you're using the STC DIO lines, the first 8 lines of this field are ignored, and so PFI 8 is the first usable line.

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Message Edited by JoeFriedchicken on 11-19-2009 11:54 AM

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[Steven_T]

Hello Jasmine,

Those registers were fully described and outlined in Joe's post because they are not in the manual. Do you have questions about these registers?

Thanks,

Steven T.

[Jasmine1688]

Hi, Steven,

I see. No, we don't use these registers now. I am just curious.

Thanks.

[yechiel]

Hello

Thanks for checking.

I assume this issue was closed a year ago.

Custome ris working OK so far and actually is waiting for the new PCIe/PXIe form new Counter/Timer boards.

Yechiel