Newbie question about Dynamic Acquisition

[BoilerBob]

The "NI Digital Waveform Generator/Analyzer Help" document, under "Fundamentals -> Digital Terminology -> Acquisition -> Dynamic Acquisition", says: "At every clock edge, the Pattern Acquisition Engine stores the current state of each DIO channel configured for dynamic acquisition into onboard memory as a sample."

That would seem to imply two samples per clock cycle - one on the rising edge of the clock and one on the falling edge.

However, I thought this was only true for Double Data Rate (DDR) operation.

• In the "Single Data Rate (SDR)" section, the help document says "When the data rate multiplier is configured for SDR operation, the NI digital waveform generator/analyzer generates or acquires data once per Sample clock period.
• In the "Double Data Rate (DDR)" section, the help document says "

  When the data rate multiplier is configured for DDR operation, the NI digital waveform generator/analyzer generates or acquires data twice per Sample clock period."

Am I mis-reading the Help document?  Am I confused about what clocks are being referenced?  Something else?

If it matters, I'm working with a PXI-6562 card.