PXI-6653 DDS ClkIn reference

[jboss]

When I use the example with NI-SYNC called Generate DDS Clock and Route.vi and select DDS Clock Source Terminal: ClkIn, and Destination Terminal: ClkOut, the card does not generate an output clock. If I then click stop, I'm given the error message:

Error -1074118606 occured at niSync Connect Clock Terminals.vi

Driver Status: (Hex 0xBFFA4032) The specified source terminal is invalid for this operation.

If I change the DDS Clock Source Terminal to one of the other sources, I get a signal on ClkOut, but it is not phase locked to my external 10MHz reference oscillator. 

How do I generate a DDS clock signal which is phase locked to an external 10MHz reference oscillator connected to ClkIn?

Thanks,

John Bosshard

[Simran_K]

Hi John,

You need to use two LabVIEW examples for this task. Run the Check Clk10 & Route Clock.vi first to route ClkIn to the backplane PXI_Clk10. Then run the Generate DDS Clock and Route.vi to route the PXI_Clk10 to ClkOut. This will work as long as your signal meets the backplane 10MHz clock specifications.

Thank you,

[jboss]

Even when run by itself, "Check Clk10 & Route Clock.vi" fails. Upon running it, I get "Error -1074118606 occured at niSync Connect Clock Terminals.vi"

Possible reason(s):

"Driver Status:  (Hex 0xBFFA4032) The specified source terminal is invalid for this operation."

So--essentially the same error as above. 

[jboss · Accepted solution]

Solved--PXI-1033 S1 backplane jumper needed to be moved.

John Bosshard

[Simran_K]

Hi John,

Thank you for letting me know and I am glad everything is working now.

Regards,