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myVHDL 7 Segment LED

Description:

This example shows how to use already written VHDL code on the myRIO using CLIP.

 

I used this article: Importing External IP Into LabVIEW FPGA

 

My VHDL Code represents the control of a 7-segment LED indicator.

 

Instructions on how to use Code: 

 

Open the 7segCaller.vi. This VI on the FPGA actually calls the VHDL code.

When you run 7segcaller.vi you will be given a choice on how to compile your code. If you installed the Xilinx tool from DVD 2 of the NI myRIO Software Suite, you will be able to compile your code on the local host option.

 

 

Pin-out:

Connector C/DIO7:0

academic2.PNG

 

Code: myVHDL.zip attached

Sunaina K.
Product Marketing Manager for CompactRIO & TSN

Making the intangible, tangible
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