Re: We need to find a solution for the bitfile name scrambling
Altenbach, I believe the problem you are seeing only relates to the Build Spec for the FPGA Main bitfile. That is, if the user were to recompile their FPGA VI, the new bitfile would have the name spacing shown. Is your screenshot showing the FPGA Main Properties for configuring the build spec, or a different property window?
Yes, the screenshot shows the FPGA build spec right after demo project generation. Hopefully your solution will work around this issue.
In any case, if I try to run the project out-of-the-box, it wants to recompile because it is looking for the wrong bitfile.