Re: Getting Started With Channel Wires

>Data Flow is left to right

Data flow from left to right seems like a general convention that aids in creating as well as understanding diagrams.  However, we sometimes find it convenient to bend the rule a little.  If we have a long skinny diagram it may be better to have it fit on one page than have to scroll back and forth to see it all.  In that case we typically put the second half below the first half and have a backwards flowing wire going from the right end of the first half to the left end of the second half.  A moment's reflection makes it clear what's going on so this is reasonable.

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Using shift registers makes it possible to stick to the convention of left to right flow (because the shift register does the hidden back flow from right side to left side), but sometimes it is convenient to use a feedback node instead.  That introduces backward flowing wires, but again, it's easy to see what is going on as long as the extent of the backward flow isn't too long.

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To make backward flowing wires more instantaneously recognizable I could imagine decorating wires that flow left or up with a background glyph pointing left or up.

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>Sub-VI that run in parallel are generally arranged vertically

Now, a case can be made that having the same convention of left-to-right flow for Channels makes sense.  It certainly seems that a diagram such as examples/Channels/Stream Rate Conversion/Multirate FIR would not benefit from vertical arrangement.

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A diagram like this looks similar to a LabVIEW Comms style diagram, and those diagrams definitely benefit from a convention of left-to-right flow.  It is probably true that applications using Channels will often need cycles (A sends messages to B, B sends to C, C sends to A) but that seems to be no worse than the backward flowing regular wires described above.  Seeing where the backward flowing Channels are could be enhanced using the same mechanism described above, using a background glyph.

It might be better to preserve left-to-right flow for both regular wires and Channels, and to relax the notion of having parallel processes stacked vertically.  And it turns out stacking vertically isn't as neat as it sounds.  Imagine a producer loop and a consumer loop connected by a Channel.  The Write Endpoint is inevitably at the right edge of the producer loop and the Read Endpoint is inevitably at the left edge of the consumer loop.  So, arranging the loops vertically, the downward flowing Channel also has to flow right-to-left.

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And when you add the complication that cycles will require backward (upward) flowing Channels, preserving left-to-right flow and giving up on vertically stacking seems to be the preferable convention.