Re: Can I use LVDS (in and out) from those banks which is powered from 3.3V?

Dear Gentlemen,

Thank you for your quick responses.

If I use 2.5V VCCO for a bank (where LVDS pairs are located) and I define LVCMOS_25 pins (single ended) then can these LVCMOS_25 pins tolerate 3.3V (our LVCMOS_25 pins are input and they are driven by external 3.3V CMOS outputs)? Should I add serial resistors (about 1K) to limit the current?

Thank you again for your help,


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