NI Veristand via ASAM XIL - MAPort: Expected latency on write?

[Kristofer]

Hi

Starting to evaluate using NI Veristand(2018) via ASAM-XIL (MAPort) and did some initial performance tests reading and writing values to aliases in the Engine demo using Python.

My current setup is running python using the ASAM-XIL API on one computer and Veristand on another, connected via Wifi.

Read averages on 1-2ms, sometimes slower ~6ms, something that seems rather ok.

Write is in the range 30-60ms which to me seems very slow given that the network added latency part of it should be less than 1ms.

Is this what one can expect?  Is there a obvious reason on why(update loops in Veristand?)? Other experiences or ways to improve?

Best regards!

Kristofer

[Kristofer]

Found a parameter to modify, greatly improving the latency, changed the "Data rate" setting from default 15Hz to 250Hz (anything above 250Hz gave basically no difference)

Read went down roughly 25%

Write went down to around 15ms, which I still consider a bit high for the planned usage scenario.

Anyway to improve even more?

P.S: NOTE: I have not tried against a running real time engine yet, this hopefully improves the latency even more (but that is yet to be proven)

[JeremieRdg]

Hi Kristofer,

I'm experiencing the same issue with the latency of the MAPort.

Could you please provide more information about how to modify that "Data rate" setting you found ? Is it a setting of the MAPort ? How can I access it ?

I couldn't find anything about that setting in the ASAM XIL documentation.

Thank you for your help !

Best regards,

Jeremie

[Kristofer]

Hi Jeremie

You can find it in the veristand .sysdef file(XML).

/Kristofer

[JeremieRdg]

Got it. Works fine. 

I set it to 200Hz and I got something close to 5ms between two read values, which is consistent. 

Thank you very much ! 

Jeremie

[Kristofer]

Glad to be able to help out!

Would hope some one with insight and expertise could help out elaborating on possibilities to improve even more (maybe someone from NI?)

BTW: Can you please check what write performance you get and reply?

/Kristofer

[JeremieRdg]

My results are as follow (average on 1000 readings and writings) :

Average time between readings : 0.00034208345413208006 s

Average time between writings : 0.011740875959396362 s

 So, around 0.4 ms for readings and 12 ms for writings. 

(I am running the Veristand Engine on my PC, not on a real time target)

[tic.not.tock]

Hey JeremieRdg,

FYI that the gateway for 'localhost' and the gateway for an RT target are slightly different. If you are going to use an RT target, I would recommend also benchmarking with the RT target connected.

My hunch is that you will see fairly similar results across the gateway for 'localhost' and for an RT target in VeriStand 2018 and later, but there is a chance it is slightly different. 

Thanks,

Andy

PSE 

[Kristofer]

Hi Tic.not.tock

We are about to set up the RT target and perform the same benchmark, will return with results.

/Kristofer

[tic.not.tock]

I wanted to follow up on the difference between the read and write speeds. The XIL standard requires that both the read and write methods must be synchronous.

When reading, the value is read from a cache that is stored on the VeriStand gateway. There is low latency, but the read value may not be the latest value in the VeriStand engine. 

When writing, the write method waits for the gateway cache to be updated to the new value before exiting to ensure that a new read would get the written value. This means that the write method may need to wait a full cache refresh period. This cache refresh rate is set by the "Data Rate" and, by default, is set to 15 Hz. As I believe you have done, you can speed up the refresh rate to decrease the write method time, but increasing the data rate can impact RT performance. 

Thanks,

Andy

PSE