I am trying to create an asynchronous custom device for VeriStand and have the following questions:
a) At what rate is input channel being scanned and data pushed into the input FIFO of the custom device? Is the scan rate affected by whether the input channel is mapped to a Workspace control object or whether it is mapped to a simulation model (.dll file) output?
b) At what rate is the asynchronous custome device real-time VI being executed? Is it at the same rate as the primary control loop rate? Can I change the execution rate of a custom device and how?
c) I have a quad-core PXI real-time platform. How can I assign the custom device to a specific processor, like what you do with a simulation model (.dll file) in the system definition file?
Thank you in advance.
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The rate at which data is pumped to your Custom Device is static, and has nothing to do with whether the Workspace is connected, or whether a model is mapped to any of your channels. By default, data is pushed into your Custom Device's input FIFO every iteration of the Primary Control Loop. If the FIFO is full, the oldest data packet will be overwritten. Also, by default your outputs FIFO is checked ever iteration of the Primary Control Loop. You can, however, use the function NI VeriStand - Set Custom Device Decimation to tag a property on your custom device that will indicate to the system its expected decimation. If you set a decimation of 10, for example, the Primary Control Loop will only send new data every 10 iterations and only check for new data from your outputs FIFO every 10 iterations. This can help reduce the CPU load of your system if you don't need updates that often.
Similarly, you can use the function NI VeriStand - Set FIFO Depth to control the FIFO depths of your inputs and outputs FIFO respectively. By default both have depth 1.
The rate at which your Custom Device executes depends entirely on how you set it up. You can, for instance, have your asynchronous Custom Device use its own timing and run at a completely independent rate from the system. Your VI could have a regular while loop with a 10ms timer in it, for instance, or it could be based off some hardware device timing.
You can also choose to tightly synchronize yourself with the Primary Control Loop. You do this by registering using a property that your Custom Device has a Timed Loop that will use the Device Clock. The Device Clock is a timing source that is ticked every iteration of the Primary Control Loop after Custom Device FIFOs have been updated. You register for this simply by calling the property NI VeriStand - Set Loop Type and specifying Timed Loop for loop type and Use Device Clock to be True. Then, as the template VI does, just wire the Device Clock into your timing source input for the Timed Loop. If you have specified a decimation factor, as mentioned above, you should probably also use this factor as your dt. This means if you have a decimation of 10, you should only execute your Timed Loop every 10 ticks of the Device Clock timing source.
Another easy way to synchronize yourself tightly with the Primary Control Loop with little hassle is to simply base your timing off the availability of new data in your Inputs or Outputs FIFO. To do this, you could just use a regular while loop, and then just wire -1 to the FIFO timeouts. Then your Custom Device will run as fast as data is being produced and consumed by the system.
Specifying a Processor
There is no built-in property for processor assignment, but it will be very easy for you to implement this yourself. You can specify the Processor to execute on in System Explorer by creating a custom property using NI VeriStand - Set Item Property. For instance, you could set an I32 property called "Processor", with -2 meaning auto-assign, and any non-negative value indicating a specific processor index. Set this property in one of your Custom Device configuration pages in System Explorer and then read the property in the Driver VI in the engine using NI VeriStand - Get Item Property. Then just wire the property value to the processor affinity input on your Timed Loop. You should, however, always check that that processor exists on the target. Otherwise the Timed Loop will report an error and abort. This is exactly what we do for models internally.
Thanks again for your helpful and detailed explanation. This sort of useful information should be included in the VeriStand built-in help.
With regards to NI VeriStand - Set Custom Device Decimation and NI VeriStand - Set FIFO Depth, should they be called in Sytem Explorer configuration VI or RT driver VI or it works in both?
With regards to specifying a Processor, if I am only using a regular while loop instead of a Time loop, is there any way I can specify the Processor to be used?
You always want to set properties in the configuration VIs in System Explorer. The system definition is read-only on the RT Target.
If you use a regular while loop, the only way I know of to specify processor affinity would be to put the whole loop in a Timed Sequence Structure. But I'm not really sure that's a good idea.