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Labview FPGA program for Veristand hybrid mode


I am trying to write an FPGA program that runs in hybrid mode with the scan engine/ethercat custom device and I am wondering if I need to add anything to the code besides my FPGA processing code?  I have looked at the Veristand FPGA template and it has code for starting and timing synchronization, but I am not sure if that is needed in this case.  I wrote a simple program using user defined variables and was able to deploy, but it doesn't seem like I am getting any data back from the FPGA channels, so I am not sure if there is anything I need to do to initialize the program.

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What FPGA module are you using?

If it is cRIO (which has its controller), you can use Scan Engine/EtherCAT Custom Device.

If it is a R Series or FlexRIO, you should use FPGA Addon. See Getting Started With NI FPGA Devices in NI VeriStand

Control Lead | Intelline Inc
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Thanks for the response.  I am using a crio and I am already using the scan engine/ethercat custom device, but I want to use the FPGA and the scan engine custom device and I am not sure if the FPGA program needs any additional programming like the timing synchronization and startup code that is needed for using the FPGA without the custom device or do I just need to read/write to the UDV's without any additional code?

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You would just need the UDV.

Using FPGA and Real-Time Scan Resources in the VeriStand Scan Engine Custom Device

Control Lead | Intelline Inc
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